IntroductionUser ProgramProgram ExecutionOperating Modes and ProgramProcessing LevelsInterrupt and Error DiagnosisIntegrated Special FunctionsExtended
1IntroductionAims of the manualThis manual is intended to provide specialized information aboutprogramming the CPU 928B for users who already have bas
Further examples of timer and counter values Loading timer values directly:"L T 10": Loads the binary timer value of timer T 10directly
If you load values in BCD, status bits 14 and 15 of the timer or 12 to15 of the counter are not loaded. They have the value 0 in ACCU 1.The valu
Arithmetic operations Operation Operand Function+F-FxF: F+G-GxG:G– Add two fixed point numbers (16 bits)Subtract one fixed point number from another
Comparison operations Operation Operand Function! =>< F>D> = G<<= – Compare for equal toCompare for not equal toCompare for greate
G DB/GX DX Generating a data blockThe operation G DBx generates a DB data block with the number x(3 ≤ x ≤ 255) in the user memory of the CPU. The con
3.5.2Programming Examples inthe STL, LAD and CSFMethods of RepresentationLogic operationsI 1.7I 1.3I 1.1Q 3.5Logical/circuit diagramSTEP 5 representat
Logic operations (continued)OI 1.2OOI 1.7I 1.5= Q3.2I 1.2I 1.7I 1.5Q 3.2state "0" simultaneouslyOutput Q 3.2 is "1" when at least
Logic operations (continued)I 6.0I 6.3I 6.2Q 2.1Output Q 2.1 is "1" when input I 6.0 or input I 6.1 and oneof the inputs I 6.2 or I 6.3 has
Logic operations (continued)Set/reset operationsI 1.5 Q 3.0I 1.5 I 1.6Q 3.0&I 1.6I 1.5Q 3.0AI 1.5AN I 1.6= Q3.0I 1.6I 1.5I 1.6 Q 3.0&Output Q
Set/reset operations(continued)I 1.3 I 2.6I 2.6 F1.7I 1.3F 1.7I 2.6F 1.7I 1.3SRQA I 2.6 I 1.3F 1.7SRF 1.7AI 2.6I 1.3F 1.7SRS1110Signal state "1
1.1 Area of Application for the S5-135U with the CPU 928BSIMATIC S5 familyThe S5-135U programmable controller belongs to the family ofSIMATIC S5 progr
Set/reset operations(continued) On each leading edge of the signal at input I 1.7,the AND condition (AI 1.7 and AN F 4.0) is satisfied;the RLO is &quo
Timer operationsSubsequent scans with an RLO of "1" do not affect theIf the RLO is "0", the timer is reset (cleared).timer.KT 10.2
Timer operations (continued)The timer is started during the first scan if the RLO is"1".A I 3.1L IW 15SE T 2T 2AQ 4.1=I 3.1
Timer operations (continued)The timer is started during the first scan if the RLOis "1". An RLO of "1" during subsequent scans doe
Timer operations (continued)TSTVBIDERQI 3.3Q 4.3I 3.2 I 3.3Q 4.3T4Q 4.3RS20s 0I 3.3T4I 3.2I 3.2TSBIDERQI 3.3I 3.2T4 T4I 3.3Q 4.3TTtimer has elapsed. T
Counter operationsWhen the result of logic operation changes at the start input(I 4.1) from "0" to "1", the counter is loaded with
Counter operations(continued)I 4.1RSCQCI+binary16 bitsCDBIDERQC1CUSCVOwing to the two separate edge flags for CU and CD,a counter with two different i
Counter operations(continued)I 4.0RSCI-binary16 bitsCUBIDERQC1CDSCVOwing to the two separate edge flags for CU and CD,a counter with two different inp
Comparison operationsV1V2! =FQQ 3.0LI B19L IB20! = F= Q 3.0IB19IB20 Q 3.0IB19IB20C1C2! =FQnot equal to ACCU-2-L.in the list of operations.ACCU-2-H and
Comparison operations(continued)Q 3.1LI B21L DW3> < F= Q 3.1IB21DW3V1V2> <FQ Q 3.1IB21DW3V1V2> <FQRLO = "0": comparison i
This page has been left intentionally blank.1Area of Application for the S5-135U with the CPU 928BCPU 928B Programming GuideC79000-D8576-C898-011 - 5
3.5.3Supplementary OperationsYou can use the supplementary operations set on the programmeronly in function blocks (FB and FX). This means that the to
Binary logic operations Operation Operand FunctionA= AN =O=ON =AND operation, scan a formal operand for signal state ’1’AND operation, scan a formal
Set/reset operations Operation Operand FunctionS= RB =RD===Set a formal operand (binary)Reset a formal operand (binary)Reset a formal operand (digita
Timer and counteroperations Operation Operand FunctionSP =SD =SEC =SSU =SFD =FR =Start timer specified by the formal operand as a pulse with thevalu
ExamplesFunction block call Program in the function blockProgram executeda):JU FB 203NAME :EXAMPLE1ANNA : I 10.3BERT : T 17JOHN : Q 18.4:A =ANNA:L KT
Load and transferoperations Operation Operand FunctionL=LCD =LW =LWD =T=Load a formal operand:The value of the operand specified as a formal operand
Operation Operand FunctionL RI 0 to 255RJ 0 to 255Load a word from the interface data area into ACCU 1 (RI area)Load a word from the extended interfa
Arithmetic operations Operation Operand FunctionENT – This causes a stack lift into ACCUs 3 and 4:<ACCU 4> := <ACCU 3><ACCU 3> :=
Operation Operand FunctionSADD BN -128 to+127Add a byte constant (fixed point) to ACCU-1-L (includessign change)/the condition code in CC 0, CC 1, O
3.5.4Executive OperationsThe executive operations also include system operations. CautionSystem operations should only be used with care and then only
1.2 Typical Mode of Operation of a CPUMode of operation of a CPUThe following modes of operation are possible in a CPU: Cyclic processing This is th
Operation Operand FunctionTable 3-19 continued:JN =JP =JM =JO =JOS =addr(addr = symbolicaddress withmaximum 4 characters)Jump if result is not 0 : the
Shift operations Operation Operand Function (operation with ACCU 1)SLWSRWSLDSSWSSDRL D RRD0 to 150 to 150 to 320 to 150 to 320 to 320 to 32Shift a w
Examples1. You want to shift the contents of data word DW 52 four bits to theleft andwrite them to data word DW 53.STEP 5 program: Contents of the dat
Conversion operations Operation FunctionCFWCSWCSDDEFDUFDEDDUD FDGGFDForm the 1’s complement of ACCU-1-L (16 bits)Form the 2’s complement of ACCU-1-L
DEDThe value in ACCU 1 (bits 0 to 31) is interpreted as a BCD number.After the conversion, ACCU 1 contains a 32-bit fixed point number.DUDThe value in
This conversion algorithm produces the following result classes:•• Floating point numbers ≥ 0 or ≤ -1 result in the next lower number.•• Floating poin
Decrement/increment Operation Operand FunctionD I 1 to 2551 to 255Decrement the low byte (bits 0 to 7) of ACCU-1-L by the value of the operand 1)Inc
Operation Operand FunctionTable 3-23 continued:S BI1)Indirect processing of a formal operand:execute an operation whose operation code is stored in a
Examples of DO operationsDO DW/DO FWOperand substitution Using the statements "DO DW" and "DO FW" you can access data witha subst
Operand substitution with binary operationsFor operand substitutions with binary operations you can use thefollowing operand types: inputs, outputs,
Time-controlled processing In addition to the cyclic processing, time-controlled processing isalso available for processes requiring control signals a
Parameter word for F flagsBit no. 15 11 10 8 7 0no significance Bit addressfrom 0 to 7Byte address from 0 to 255Parameter word for S flagsBit no. 15 1
Example of DI operationIn function block FB 1, STEP 5 operations are executed whose operationcodes were transferred by a calling block as formal opera
Disabling/enablingprocess interrupts FunctionIARADisable external process interrupt servicingEnable external process interrupt servicingYou can use
SED/SEE disable/enablesemaphore (non-system operations) Operation Operand FunctionSEDSEE0 to 310 to 31Disable (set) a semaphoreEnable (relea
Use of SED/SEEFig. 3-8 illustrates the basic sequence of coordinated access using asemaphore. Before disabling or enabling a particular semaphore, th
NoteThe scanning of a particular semaphore (= read procedure) andthe disabling or enabling of the semaphore (=write procedure) areone unit. No other C
Application example forsemaphoresTasks:Four CPUs are plugged into an S5-135U. They output status messages to astatus signalling device via a common me
Semaphore application example continued:FB 0NAME :MAIN:A F 10.0:JC =M001 If no message is active,::AN I 0.0:BEC::L KH 2222 generate message and :T F
Semaphore application example continued:FB 100NAME :SEMADIS:SED 10 Disable semaphore no. 10 :JZ =M001:AN F 10.1 If the semaphore is disabled successfu
Contents of Chapter 44.1 Introduction and Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 The Programs in a CPUThe program existing on every CPU is divided into the following:•• the system program and •• the user program. System prog
4Operating Modes and ProgramProcessing LevelsThis chapter provides an overview of the operating statuses andprogram execution levels of the CPU 928B.
4.1 Introduction and OverviewThe CPU 928B has three operating modes:•• STOP mode•• RESTART mode•• RUN modeIn the RESTART and RUN modes, certain events
LED display of modesVarious LEDs on the front panel of the CPU signal the current CPUmode. The following table shows you the relationship between theS
Signalling and error LEDsBASP LEDThis indicates whether the S5 bus signal BASP (disable commandoutput) is active:In the single processor mode, the CPU
4.2 Program Processing LevelsFig. 4-2 gives an overview of the operating states and the processinglevels in the CPU 928B (-3UB12). The explanations of
Features of a programprocessing levelA program processing level is characterized by specific features whichare explained on the following pages.1) fro
Nesting other levelsWhen an event occurs, which requires higher priority processing, thecurrent level is interrupted by the system program and the hig
PriorityProgram processing levels have a fixed priority. Depending on thispriority, they can interrupt each other or can be nested within eachother.Th
Response to double errorOnce an error level has been activated (ADF, BCF, LZF, QVZ, REG,ZYK) it cannot be activated again until it has been processedc
Description of the individuallevelsThe individual program processing levels and the corresponding userinterfaces are described in more detail in the f
TasksThe tasks include the following: 1)•• cold and warm restart,•• updating the process image of the inputs and outputting theprocess image of the ou
4.3 STOP Mode4.3.1Characteristics andIndication of the OperatingModeThe STOP mode is distinguished by the following features:User programThe user prog
STOP LED lit continuouslyThe STOP mode was triggered by the following:•• in the single processor mode- the mode selector was switched from RUN to STO
4.3.2Requesting an OVERALLRESETRequest by the systemprogramEach time you turn on the power and perform an overall reset, theCPU runs through an initia
4.3.3Performing an OVERALLRESETRegardless of whether you yourself or the system program requestedan overall reset, you perform the OVERALL RESET as fo
4.4 RESTART ModeThe RESTART mode is distinguished by the following features:Transition from STOP to RUNThe RESTART is the transition from the STOP mod
4.4.1MANUAL and AUTOMATICCOLD RESTARTWhen is a COLD RESTARTpermitted?A COLD RESTART is always permitted provided the system is notrequesting an OVERAL
4.4.2MANUAL and AUTOMATICWARM RESTARTWhen is a WARM RESTARTnot permitted?A MANUAL WARM RESTART is not permitted in the followingsituations:•• when the
AUTOMATIC WARMRESTARTIf there is a power failure/POWER OFF during RESTART or RUN,when the power returns again/POWER ON, the CPU performs aninitializat
4.4.3Comparison of theDifferent RestartTypes System programperformsCOLD RESTART WARM RESTART RETENTIVE COLDRESTARTmanual automatic manual automatic
System programperformsCOLD RESTART WARM RESTART RETENTIVE COLDRESTARTmanual automatic manual automatic manual automaticTable 4-2 continued:Deletion of
User program Tasks The user program contains all the functions required for processing aspecific control task. In general terms, these functions can
You can do the following in the RESTART OBs:•• set flags,•• start timers (the start is delayed by the system program until theuser program enters the
NoteThe CPU registers a power down (NAU or PEU) even when thisoccurs in the STOP mode. If you then trigger a MANUALWARM RESTART, the CPU calls OB 22 b
4.4.5Interruptions in theRESTART ModeA start-up program can be interrupted by the following:•• NAU (power failure) or PEU (power failure in expansion
MANUAL WARM RESTARTafter aborting a RESTARTIf the CPU goes to the STOP mode during any RESTART (stopswitch of ADF) and you then trigger a MANUAL WARMR
4.5 RUN ModeWhen the CPU has executed a RESTART (and only then) it changesto the RUN mode. This mode is characterized by the followingfeatures:Executi
•• 9 TIME INTERRUPTS: the user program is processed at fixed intervals specified by the system.•• CONTROLLER time-driven processing of a preset INTER
PrincipleThe system program activities are as follows:User interface: OB 1 or FB 0 The system program calls organization block OB 1 or function blockF
If you have a short time-critical user program in which you do notrequire structured programming, then program FB 0. Since you usethe total STEP 5 ope
4.5.2Time-Driven ProgramExecutionTime-driven processing occurs when a time signal from a clock orinternal clock pulse prompts the CPU to interrupt the
InterruptionsWith the default setting, the TIMED INTERRUPTS level has thehighest priority of the basic levels (can be modified by changing theparamete
Structure User memoryCode blocksData blocksOrganizationblocksOBDBDXPBFB/FXSBFB 8SEGMENT 1NAME :TRANS0005 :L IB 30006 :T FW 2000007 :C DB 50008 :DO FW
Clock-driven time interruptsThe CPU 928B has a battery-backed clock (central back-up via thepower supply of the central controller), which you can set
User interface: OB 9OB 9 is called as the user interface for a clock-driven time interrupt.You store a STEP 5 program in OB 9 that is to be processed
TIME INTERRUPTS Program execution in fixed time basesIn the CPU 928B, you can execute up to 9 different time-drivenprograms, each program being called
Interrupt pointsTime-driven program execution can be interrupted either at blockboundaries (default) or at operation boundaries (programmed inDX 0) by
When the system program calls OB 33, it transfers additionalinformation to ACCU 1 and ACCU 2 which provides more detailabout the first error to occur.
NoteWith respect to time-driven program execution, remember thespecial functions OB 120, OB 121, OB 122 and OB 123 withwhich you can disable or delay
Interrupt pointsClosed loop control processing can be interrupted either at blockboundaries (default) or at operation boundaries (programmed inDX 0),
Interrupt pointsProcess interrupt-driven program execution can only be interrupted bythe following:•• a program or device error (at operation boundari
A process interrupt is also recognized and processed when theinterrupt signal is no longer active when the block boundary isreached. When it is cal
Disabling interrupt-drivenprocessingThe system program inserts an interrupt-driven program into thecyclic program at a block boundary or at a STEP 5 o
Storing the user programThe CPU 928B has two areas for storing blocks:•• User memory: max. 64 KbytesThe user memory is on a plug-in RAM or EPROM submo
If a process interrupt and a time interrupt occur simultaneously theprocess interrupt is processed first at the next interrupt point. Afterthis is com
Response timeThe response time to a time interrupt request corresponds to theprocessing time of a block or a STEP 5 operation (depending on theselecte
Contents of Chapter 55.1 Frequent Errors in the User Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 - 45.
5.6.4 QVZ (Timeout Error) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 - 53QVZ during di
5Interrupt and Error HandlingThis chapter explains how to avoid errors when planning andprogramming your STEP 5 programs.You will see what help you ca
5.5 Frequent Errors in the User ProgramThe system program can detect faulty operation of the CPU, errors inthe system program processing or the effect
5.6 Error InformationIf an error occurs during system start-up or during cyclic execution ofyour program, there are various sources of information to
OUTPUT ISTACKprogrammer online functionYou can get information about the status of the control bits and thecontents of the interrupt stack (= ISTACK)
The two data words are stored at the following absolute memoryaddresses:system data word RS 3: KH = EA03system data word RS 4: KH = EA04The error iden
Analysis of ACCU 1 andACCU 2 on the programmerUsing the online function OUTPUT ISTACK, you can read thecontents of the two accumulators directly out o
CopyrightCopyright © Siemens AG 1994 All Rights ReservedThe reproduction, transmission or use of this document or its contents is not permitted withou
1.4 Which Operands are available to the User Program?The CPU 928B provides the following operand areas forprogramming: •• process image and I/Os•• fl
Example: Evaluating the BSTACK function:BLOCK NO BLOCK ADDR RETURN ADDR REL ADDR DB NO DB ADDROB 23FB 5FB 6OB 10063006A008A009D006400720091009E0001000
5.7 Control Bits and Interrupt StackUsing the PLC INFO and OUTPUT ISTACK online programmerfunctions, you can analyze the operating status, the charact
5.7.1Control BitsWhen you display the ISTACK on the PG the statuses of the controlbits are shown on the first screen page (see Fig. 5-1). The contro
The following tables explain the meaning of the individual bits.>>STP<< line (CONTROL BITS)Control bit Meaning»STP«CPU is in the STOP mode
>>ANL<< line (CONTROL BITS)Control bit Meaning»ANL«CPU is in the RESTART modeANL-6+MWARETENTIVE MANUAL COLD RESTARTANL-6+AWARETENTIVE A
>>RUN<< line (CONTROL BITS)Control bit Meaning»RUN«CPU is in the RUN mode (cyclic processing is active)RUN-6Not usedEINPROZSingle proce
Lines 4 and 5 (CONTROL BITS)Control bit MeaningDIG-AUSAddress list for digital outputs existsTable 5-4 continued:URGELOEOverall reset performed on CPU
Lines 6 to 8 (CONTROL BITS)Control bit MeaningDX0-FEParameter assignment error in DX 0 or DX 2FE-22Not usedMOD-FEError in contents of user submodul
Lines 6 to 8 (CONTROL BITS)Control bit MeaningWECK-FECollision of time interrupts:an attempt was made to call a particular time interrupt OB a second
5.7.2ISTACK ContentIf the CPU is in the stop state, you can display the content of theISTACK on the screen after the control bit display by pressing t
F flags Characteristics SizeThe flag area is a memory area which the userprogram can access extremely quickly with certainoperations.The flag area sh
Explanation of the ISTACKscreen DEPTHInformation level of the ISTACK when more than one error hasoccurred:DEPTH 01 = last cause of stop to occurDEPTH
Information about the errorISTACK ID MeaningTable 5-6 continued: LEVEL Z(continued)Z: 001A: not used001C: CL CONTROLLER INTERRUPT001E: not used0020: D
Information about the errorISTACK ID Meaning...NO.Block type and number of the last blockprocessedTable 5-6 continued:REL-SACRelative STEP address cou
Information about the errorISTACK ID MeaningACCU 1...4Contents of the calculation registers at the time ofinterruption:in the event of certain errors,
Cause of interruptISTACK IDMeaning (called error OB)BAUBattery not ready = back-up battery failure (centralcontroller)MPSTPMultiprocessor STOP:- rese
Cause of interruptISTACK IDMeaning (called error OB)REG-FEError processing the controller structure R64 in theCYCLESTUEBBlock stack overflow:nesting d
5.7.3Example of Error Diagnosisusing the ISTACKExample 1:Fig. 5-3 illustrates the structure of the ISTACK in conjunction with the interruptions that h
Example 2:In this example the CPU detects an addressing error when executing the "A I x.y" operation in OB 1. This leads to the processing o
Continuation 1 of Example 2:Two interrupted program execution levels lead to the creation of atwo-level ISTACK (see Figs 5-5 and 5-6):
Continuation 2 of Example 2: INTERRUPT STACKDEPTH02SAC: 001A DB-ADD:DB-NO.:DBL-REG.:BA-ADD:000000000001 OB-NO.:REL-SAC:ICMK: ICRW:000A02001160004BLK
Timers (T) Characteristics SizeThe user program loads timer cells with a time valuebetween 10 ms and 9990 s and by means of a startoperation, decreme
5.4 Error Handling using Organization BlocksWhen the system program detects an error, it calls the appropriateorganization block to handle it. You can
Cause of error Organizationblock calledReaction of CPU if OB is not programmed 1)Table 5-8 continued:Error processing the controller structure R64 (RE
If you do not want to program the corresponding organization block,you can prevent the transition to the STOP mode by assigningappropriate parameters
5.5 Errors during RESTARTDuring initialization and during a restart, causes of interruptions anderrors can lead to the restart program being aborted a
Control bitor ID inISTACKExplanationTable 5-9 continued:DB2-FE 1)Error evaluating DB 2 of the controller structureR64DX0-FE 1)Error evaluating data bl
5.5.2DB1-FE (DB 1 Errors)Error evaluating DB 1 to set up the address list for updating theprocess image.•• DB 1 does not exist in multiprocessor opera
Error identifierRS 3 RS 4ExplanationTable 5-11 continued:041AH yyyyH Timeout with digital outputsyyyy = address of the unacknowledged output flag byte
5.5.4DX0-FE (DX 0 or DX 2 Errors)NoteDX 0 and DX 2 errors have a common control bit (DX0-FE) inthe control bit screen form.Errors evaluating data bloc
Error identifierRS 3 RS 4ExplanationTable 5-14 continued:0453H yyyyH Link type illegalyyyy = link type0454H xx00H Data identifier for stat. parameter
5.6 Errors in RUN and in RESTARTIn the RUN mode, cyclic, time-driven or interrupt-driven programexecution or controller processing can be interrupted
1.5 Accessing Operand Areas and Memory AreasSTEP 5 operations use two different mechanisms for accessingoperand areas and the entire memory:Relative a
Errors- which cause an errorOB to be called Control bitor ID inISTACKExplanation OB no.BCFOperation code error:- substitution error- operation co
5.6.1BCF (Operation CodeErrors)An operation code error occurs when the CPU either cannot interpretor cannot execute a STEP 5 operation in the user pro
Operation code error (OB 29)An operation code error is detected by the CPU during the executionof a STEP 5 program when an operation is programmed th
Parameter error (OB 30)An illegal parameter occurs when an operation is programmed with aparameter that is not permitted for the particular CPU (e.g.
Error identifierACCU-1-LACCU-2-LExplanation(illegal parameter in...)Table 5-19 continued:183BH —L SD/T SD parameter >1020183CH —G DB/GX DX param
When OB 19 is called, ACCU 1 contains additional information thatdefines the error in greater detail.Error identifierACCU-1-L ACCU-2-LExplanation1A01H
When the system program detects a load/transfer error, it callsorganization block OB 32, if it is loaded. The operation that causedthe transfer error
When OB 31 is called, ACCU 1 and ACCU 2 contain additionalinformation that defines the error in greater detail.Error identifiers of differentoperation
OB 182 error identifiers Error identifierACCU-1-L ACCU-2-LExplanation1A34H 0001H description of the data field 1A34H 0100H address area type is i
Error identifiers of thedifferent special function OBsThe table below contains identifiers of OB 110, OB 121, OB 122, OB 221, OB 240, OB 241, OB 242 a
1.6 How to Tackle ProgrammingIf you are an experienced user, you have probably found the mostsuitable method for creating programs for yourself and yo
OB 150 error identifiers Error identifierACCU-1-L ACCU-2-LExplanation1A4CH 0001H illegal function number (=0 or >2)1A4CH 0100H address area t
Error identifiers of OB 151,OB 152 and OB 153 Error identifierACCU-1-L ACCU-2-LExplanationOB 151 identifiers1A4DH 0001H function number illegal(=
Error identifiers of differentsystem operations Error identifierACCU-1-L ACCU-2-LExplanation1A50H — LRW, TRW:the calculated memory address<BR +
Error identifierACCU-1-L ACCU-2-LExplanationTable 5-27 continued:1A58H — TNW, TNB: the source field is not completely in oneof the following ranges:0
5.6.3ADF (Addressing Error)An addressing error occurs when a STEP 5 operation references aprocess image input or output to which no I/O module was ass
Error identifiersACCUs 1 and 2 contain additional information that defines the errorin greater detail.ACCU1-L = 1E23HACCU2-L = QVZ addressQVZ addressT
NoteIf the organization blocks called are not programmed, the userprogram is continued.If a timeout occurs, the CPU reads in the substitute value &quo
5.6.5ZYK (Cycle Time ExceededError)The cycle time includes the entire duration of cyclic programexecution. The cycle monitoring time can be exceeded o
5.6.6WECK-FE (Collision of TimeInterrupts)If a particular time interrupt OB is requested before its last request hasbeen completely processed, the sys
5.6.7REG-FE (Controller Error)An error occurring during the processing of the standard functionblock for controller structure R64 is detected as a con
Stage 2Designing the program:Stage Activity1 Based on the improved block diagram, decide on thetypes of processing required of your program (cyclicpro
When OB 34 is called, ACCUs 1 and 2 contain additional informationthat defines the error in greater detail. Error identifierACCU-1-LACCU-2-LExplanat
Sampling time errorsAfter the selected sampling time has elapsed, the cyclic program isstopped at the next block boundary and the controller processin
5.6.9Communication Errors(FE-3)If problems occur on the second serial interface with the computerlink RK 517, data transfer with procedure 3964/3964R,
BREAKIf there is a BREAK on an interface, OB 35 is only called at thebeginning and end of the BREAK status.Error numbers 1 to 3Here, a maximum of thre
Contents of Chapter 66.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.17 OB 182: Copying a Data Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-656.18 OB 190/OB 192: T
6.32 OB 250/251: Closed-loop Control/ PID Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1106.32.1 Functional Description of the
6Integrated Special FunctionsThis Chapter tells you which integral special functions the systemprogram contains, where you can use these functions and
6.1 IntroductionThe CPU 928B operating system provides you with a number ofspecial functions, that you can call with a conditional (JC OBx) oruncondit
Block Function see section /page Table 6-1 continued:OB 220 Sign extension 6.22/6 - 90OB 221 2)OB 222OB 223OB 224 2)OB 226OB 227OB 228Set the cycle mo
Stage 3Creating, testing and starting up the program:Stage Activity1 Decide on the type of representation for the logicblocks (LAD, CSF or STL, refer
InterfacesThe following operations and parameters are available as interfaceswhen programming the use of special functions:Block call•• Conditional/un
Errors during specialfunction processingIf an error occurs during the processing of the special functions, thesystem program reacts in a specific mann
RLO, CC 0/CC 1In connection with some of the special functions, errors specific to thespecial function affect the condition codes CC 0/CC 1.If an erro
6.2 OB 110: Accessing the Condition Code Byte FunctionUsing the special function organization block OB 110, you can writethe contents of ACCU 1 to the
ResultAfter execution of OB 110, the condition code byte will have beenchanged in accordance with the function and the contents of ACCU-1.Possible err
6.3 OB 111: Clear ACCUs 1, 2, 3 and 4FunctionCalling special function organization block OB 111 is a simple way ofclearing ACCUs 1 to 4. OB 111 overwr
6.4 OB 112/113: Roll Up ACCU and Roll Down ACCUFunctionOBs 112 and 113 roll the contents of the ACCUs either up or down.•• OB 112 (roll up) shifts the
ACCU 4ACCU 2ACCU 3ACCU 131 0 31 0<ACCU 4><ACCU 2><ACCU 3><ACCU 1><ACCU 4><ACCU 2><ACCU 3><ACCU 1
6.5 OB 120: Enabling/Disabling of InterruptsA STEP 5 program can be interrupted at block or operationboundaries by programs with a higher priority. Th
The bits of the double control word are assigned as follows:Controlword bit no.Function0 = ’1’ all time-driven interrupts in fixed interval delayed1 =
1.7 Programming Tools Suitable PGsThe following programmers are available for creating your userprogram, PG 685, PG 710, PG 730, PG 750 and PG 770. Yo
ResultCalling OB 120 has the following results:Function no.inACCU-2-LContents of ACCU 1before after123Control wordMaskMaskControl wordNewcontrol wordN
6.6 OB 121: Enable/Disable Individual Time-Driven Interrupts Using the special function organization block OB 121, you canprevent the insertion of cer
The bits of the control word are assigned as follows:Bit no. Interrupt0 to 2 Reserved; these bits must be "0"!3 = ’1’4 = ‘1‘5 = ’1’6 = ’1’
Possible errors:•• Illegal function number in ACCU-2-L •• One of the reserved bits in ACCU 1 is set to "1".In the event of an error, OB 31 (
6.7 OB 122: Enable/Disable "Delay of All Interrupts" A STEP 5 program can be interrupted at block or operationsboundaries by a higher-priori
The bits of the double control word are assigned as follows:Controlword bit no.F u n c t i o n0 = ’1’ all time-driven interrupts in fixed interval are
ResultCalling OB 122 has the following results:Function no.inACCU-2-LContents of ACCU 1before after123Control wordMaskMaskControl wordNewcontrol wordN
6.8 OB 123: Enable/Disable "Delay of Individual Time-Driven Interrupts"Using special function organization block OB 123, you can preventthe
The bits of the control word are assigned as follows:Bit no. Interrupt0 to 2 Reserved; these bits must be "0"!3 = ’1’4 = ‘1‘5 = ’1’6 = ’1’
Possible errors•• Illegal function number in ACCU-2-L•• One of the reserved bits in ACCU 1 (no. 4 to 31) is set to ’1’In the event of error, OB 31 (ot
1.8 What is New with the CPU 928B (-3UB12)?The CPU 928B (-3UB12) offers you the following new functionscompared to the CPU 928B (-3UB11).Additional re
6.9 Setting/Reading the System Time (OB 150)Characteristics of thesystem time•• The resolution is 10 ms for reading and 1 sec for setting. •• Leap yea
1b) Format of the data field when reading the hardware clock The time parameters have the following meaning, permitted range ofvalues and represent
2. Accus2a) ACCU-2-LACCU-2-L contains information on the desired function and the datafield used. It must have the following structure: Function nu
ACCU-1-L ACCU-2-L Cause of error OB called1A07H - Data block not loaded OB 191A4CH 0001H0100H0101H0102H0103H0201H0202H0203H0204H0205H0206H0207H0208
"Reading the system time":You want to write the current system time to data block DB 10 from dataword DW 4. You must therefore call OB 150 w
6.10 OB 151: Setting/Reading the Time for Clock-Driven InterruptsFunctionBy calling OB 151 you can perform the following:•• program the CPU 928B, to a
The parameters have the following meanings, permissible valueranges and representations:Parameter Permissible range of values RepresentationJob type 0
2. Accus2a) ACCU-2-LACCU-2-L contains information on the desired function and the datafield used. It must have the following structure: Parameters
NoteIf the job type "0" is set in the data field and all other parametersare "F" or "FF" (hexadecimal) when you read out
Important pointsconcerning time parametersDepending on when you want to trigger a clock-driven time interrupt(timed job) you must select the individua
Contents of Chapter 22.1 STEP 5 Programming Language . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 - 42.1
Various timed jobs (24 hour format): (continued)3. "Job daily at 5:32:47"You must specify the following: job type = 3 (Function no. in
Various timed jobs (24 hour format): (continued)8. "Cancel job":You must specify the following: job type = 0 (Function no. in AC
6.11 OB 152: Cycle Statistics A series of statistical data relating to the duration of the cycle can berecorded in the CPU 928B (cycle statistics). Us
If the statistics function is enabled with OB 152, the statistical data areupdated at each cycle boundary and you can read them out by callingOB 152.I
Calculation of the averagevalueThe average value is calculated by OB 152 using the followingalgorithm:Each time the statistical data are updated, the
ParametersACCU-1-LACCU-1-L contains the function no.; it must have the followingstructure: Function no., permitted values: see table 6-6Bit nos. 4
Possible errorsAn error occurs if an incorrect function no. is transferred toACCU-1-L (only the numbers 0 to 3, 8 and 15 are permissible).In the event
When the statistical data are initialized, not only the defaults listed inthe table, but also the internal system buffer for the average aredeleted an
Initializing the statistical databy calling OB 152The following table shows how the statistical data are changed whenthey are initialized by calling O
Falsifying the statistical dataCertain events can cause problems when recording the cycle length ofthe current cycle and can lead to incorrect values.
How to use this ManualScopeThis programming guide describes the following versions of the CPU 928B-3UB11 and CPU 928B-3UB12 and its system software:Th
2User ProgramThe following chapter explains the components that make up aSTEP 5 user program for the CPU 928B and how it can be structured.2CPU 928B P
6.12 OB 153: Set/Read Time for Delayed InterruptUsing OB 153, you can transfer so-called "delay jobs" to the systemprogram. After a specifie
NoteIf a previously defined delay time is not yet elapsed when afurther delay time is defined, the previously defined time is lostand the new delay ti
Stop delay time (cancel job)STEP 5 operations for calling OB 153::::L KF +2 Value for ACCU-1-L: function no. = 2 for: "stop delay time":JU O
6.13 OB 160 to 163: Loop CountersBy using these special function operation blocks, you can implementprogram loops with a particularly fast runtime.Fun
ResultLoop counter in RLO is set (RLO = 1)system data word >0:Loop counter in RLO is cleared (RLO = 0)system data word = 0:The other bit and word
6.14 OB 170: Read Block Stack (BSTACK)Starting with OB 1 or FB 0, the block stack contains all the blocksthat have been called in sequence and that ha
ResultAfter OB 170 has been called successfully•• the offset in the data block is still contained in ACCU-2-L•• the actual number of BSTACK elements r
Block headerABSACDBALengthABSACDBALengthDW0DWnDWn+1DWn+2DWn+3DWn+4DWn+5DWn+6DWN+7older BSTACK entriessecond last entryin the BSTACK (B = 2)last e
Possible errors•• No data block opened•• Opened data block does not exist or is not long enough to take therequired number of BSTACK entries•• Illegal
Continuation of the example:After the special function OB is called, DX 10 contains the following:Block headerDW 0DW 16DW 17DW 19DW 20DW 21DW 22DW 23O
2.1 STEP 5 Programming LanguageWith the STEP 5 programming language, you convert automationtasks into programs that run on SIMATIC S5 programmablecont
6.15 OB 180: Accessing Variable Data BlocksDBA/DBL registerWhen a data block is opened with the operations C DB and CX DX,the DBA register (data block
•• Access to DBs with a length greater than 261 words (five wordsheader) over the whole length of the DB. Using OB 180, you canmove an "access wi
ResultAfter OB 180 has been called successfully•• the value of the DBA register (= address of DW 0) is raised by thevalue of ACCU-1-L•• the value of t
Continuation of the example: Because the DBL register is adjusted at the same time, error monitoringis guaranteed: the operation T DW 5 is permitted
6.16 OB 181: Testing Data Blocks (DB/DX)With the special function organization block OB 181 you can checkthe following:•• whether a particular DB or D
Result•• If the block does exist in the CPU:- ACCU-1-L: contains the address of the first data word (DW 0),- ACCU-2-L: contains the length of the da
Possible errors•• Incorrect block number (illegal: 0: DB 0/DX 0)•• Incorrect block identifier (permitted: 1 = DB, 2 = DX; illegal: 0,3 to 255)•• mem
6.17 OB 182: Copying a Data AreaFunctionOB 182 copies a data field of variable length from one data block toanother. You can use DB and DX data blocks
The range of values and meaning of the parameters is as follows:Parameters Permissible value rangeData block type (source and destination) 1 = DB2 = D
2b) ACCU-1-LNumber of the 1st data field word,permitted values (depending on the address area type):DB, DX: 0...2043F flags: 0...246 (= no. of flag
Graphic representation ofsequential controls GRAPH 5 is a programming language for graphic representation ofsequential controls. It is at a higher
6.18 OB 190/OB 192: Transferring Flags to a Data BlockApplicationWith organization blocks OB 190 and OB 192, you can transfer aselected number of flag
The following diagram illustrates the difference. NoteIf you transfer an odd number of flag bytes, only half the lastdata word in the data block is
2. Specifying the destinationACCU-1-LNumber of the first data word to be written to in the open data block:The permitted values depend on the length o
6.19 OB 191/OB 193: Transferring Data Fields to a Flag AreaApplicationWith the organization blocks OB 191 and OB 193 you can transferdata from a data
15 8 7 0Data blockDW 0DW 1DW 2DW 3Data blockDW 0DW 1DW 2DW 3DL DR15 8 7 0DL DR01234561023456FlagsOB 191OB 193(DR 0)FY 0(DL 0)FY 1(DR 1)FY 2(DL 1)FY
Parameters1. Specifying the source:1a) ACCU-2-LNumber of the first data word in the open data block to be transferred2. Specifying the destination:2a)
Example 1Before program block PB 12 is called, all the flags (FY 0 to FY 255) mustbe saved in data block DX 37 from address 100 onwards and then writt
Continuation of example 2: STEP 5 program in OB 13::C DB 100:L KY 0,255:L KB 128:JU OB 190:L KB 128:L KY 0,255:JU OB 191:::C DB 100:L KY 0,255:L KB
Further applications for organization blocks OB 190 to 193- In the CPU 928B, operations involving the processing of single bits (A, O, ON, AN, S, R, =
6.20 OB 200 to OB 205: Multiprocessor CommunicationThese special function organization blocks are described in detail inChapter 10.You can use the spe
Structured programming offers you the following advantages:•• simple and clear creation of programs, even large ones•• standardization of program part
6.21 OB 216 to OB 218: Page AccessWhat are pages?To implement a large number of communications registers, within theaddress range of the S5 bus, an ad
How to access pagesYou can use organization blocks OB 216 to OB 218 and several STEP 5 operations (see Chapter 9) to access the pages.The organization
Address areas forperipherals on the S5 busPage length Address area occupied1024 addresses (byte or wordaddresses)2048 addresses (byte or wordaddresses
You specify the page to be used when you assign parameters to thespecial function organization blocks OB 216, OB 217 and OB 218.The number of the &quo
6.21.1OB 216: Writing to a Page FunctionThe special function organization block transfers a byte, word ordouble word from ACCU 1 (right-justified) to
ACCU contents before writing: Result•• If the data is written to the page correctly:- ACCU 1 and ACCU 3: remain unchanged. - ACCU-2-L: contains a
Possible errors•• wrong length ID in ACCU-3-LH•• destination address on the page is wrong or does not exist•• specified page number does not exist 6.2
ACCU contents before reading: Result•• If the OB reads from the page successfully, - ACCU 1: (right-justified) contains the value read (the remaini
•• If the OB cannot read from the page,- all ACCUs: remain unchanged,- RLO: = 0,- all other bit and word condition codes:are cleared. Possible e
Accu assignments before calling OB 218: Result•• If the page is reserved successfully: - all ACCUs: remain unchanged- RLO: = 1- the remaining bi
Absolute and symbolicoperandsYou can enter the operand absolutely or symbolically (using anassignment list) as shown in the following example: Absolut
6.21.4Program ExampleTaskYou want to write data words 4 to 11 via the 923C coordinator from theDB 45 of a CPU 928B to the DX 45 (data words 0 to 7) of
Continuation of the example:STEP 5 operations in the RECEIVER::L KB 255 Page number:L KB 53 Coordination cell:JU OB 218 Page reserved by 2nd CPU:JC
6.22 OB 220: Sign Extension ApplicationA sign extension is necessary to extend a negative 16-bit fixed pointnumber to a 32-bit fixed point number befo
6.23 OB 221: Setting the Cycle Monitoring TimeFunctionBy calling this special function, you can modify the cycle monitoringtime and change the maximum
6.24 OB 222: Restarting the Cycle Monitoring TimeFunctionThe special function OB 222 retriggers the cycle monitoring time, i.e.the timer for the monit
6.25 OB 223: Comparing Restart TypesFunctionIf you call OB 223 in multiprocessor operation, the system checkswhether the restart types of all CPUs inv
6.26 OB 224: Transferring Blocks of Interprocessor Communication FlagsFunctionThe interprocessor communication (IPC) flags are transferred at theend o
6.27 OB 226: Reading a Word from the System ProgramFunctionThe system program of the CPU is 128 x 210 words long and islocated in a memory area that y
6.28 OB 227: Reading the Checksum of the System ProgramApplicationDuring cyclic program execution, you can check the contents of thesystem program as
ExampleChecking the checksum of the system programFunction block FB 111 is programmed for checking the checksum of thesystem program. FB 111 generates
2.1.4Number Representation To allow the CPU to logically combine, modify or compare numericalvalues, these values must be located in the accumulators
6.29 OB 228: Reading Status Information of a Program Processing LevelFunctionIf a particular event occurs, the system program calls thecorresponding p
Result- ACCU-1-L: contains the status information:= 0 → Program processing level has not been called≠ 0 → Program processing level has been activated-
6.30 OB 230 to 237: Functions for Standard Function BlocksThe special function organization blocks OB 230 to OB 237 arereserved for data handling func
6.31 OB 240 to 242: Special Functions for Shift Registers6.31.1Shift RegistersThis introduction tells you what you can use shift registers for and the
InitializingWhen you initialize a shift register (see Section 6.31.2), you specifythe number of the flag byte for pointer 1 (= base pointer). This
ExampleFigures 6-17 and 6-18 illustrate the shifting of information within ashift register with three pointers and twelve memory cells.Before the spec
Organization blocksIf you want to use a shift register, there are three special functionorganization blocks available:•• OB 240: This funciton initial
6.31.2OB 240: Initializing Shift Registers ApplicationBefore processing a shift register, you must first initialize it. This isdone by calling OB 240
The individual data words must be assigned as follows:Data word 0Must always contain the value 0.Data word 1The shift register length L is the number
NoteThe number of pointers (6 including the base pointer) must notexceed the length of the shift register.The distance of a pointer to the base pointe
16-bit and 32-bit fixedpoint numbersFixed point numbers are whole binary numbers with a sign.Coding of fixed point numbersFixed point numbers are 16 b
6.31.3OB 241: Processing Shift Registers The special function organization block OB 241 processes a shiftregister providing it has been initialized by
6.31.4OB 242: Deleting a Shift Register FunctionWith this function, you can delete a shift register in the data blockRAM. The entry in the DB 0 addres
6.32 OB 250/251: Closed-Loop Control/ PID AlgorithmYou can work with one or more PID controllers in the CPU 928B ofthe S5-135U. Each controller must b
Index kk times samplingSwitch Setting EffectS1CONTROL BIT 101The system error XWk is supplied tothe derivative unit.The derivative unit can be supplie
Inverted control directionIf you require an inverted control direction, preset a negative K value.Limiting the control informationIf the control infor
dPWk= (XWk - XWk-1)RdIk = TI ∗ XWk TI=TATNdDk = 12 (TD ∗ QUk + dDk−1) TD = TVTAIf you require the manipulated variable Yk at the
Structure of the transfer datablock Addr.in DBName I/O1)Nume-ricalformat2)PGformat3)RemarksDW0 — — — — ReserveDD 1 K I FLP KG Proportional cooeff
Addr.in DBName I/O1)Nume-ricalformat2)PGformat3)RemarksTable 6-10 continued:DD 27 Zk-1I FLP KG Historical value of the disturbanceDW 29 XZkI NF KF Val
Example of limit values- Limit valuesUpper limit value = 0.1Lower limit value = -0.1- Entries in the DB:DD 14: *1000 000 +00DD 16: -1000 000 +00- Outp
Bit assignment of the controlword STEU (data word DW 11 in the transfer DB) DW 11Bit no.Name Meaning11.0 AUTO = 1: Automatic operation= 0: Manual op
Floating point numbersFloating point numbers are positive and negative fractions. Theyalways occupy a double word (32 bits). A floating point number i
DW 11Bit no.Name MeaningTable 6-11 continued:11.8 BUMP = 1: No bumpless changeover from manual to automatic= 0: Bumpless changeover from manual to a
NoteIf DB x + 1 is not kept free during the initialization, it will beused as a controller data field without any warning if its length isidentical to
Format of controller inputsand outputsInternally, the PID control algorithm uses the floating point format fornumerical representation and can be supp
General notesUsing BUMPIf BUMP (control bit 8) is set to zero, the changeover from manual toautomatic operation is bumpless, i.e. the system error, ho
Controller parametersP controllerThe parameter for a P controller is K. This is the quotient of theoutput and input value: K = Xout/Xin. PI controll
PID controllerThe parameters for a PID controller are the proportional cooefficientK, the reset time TN and the derivative time constant TV. These int
Normalized fixed pointnumbersOne word is required to represent a normalized fixed point number ina data block. The following example illustrates the d
6.33 OB 254, OB 255: Transferring a Data Block to the DB RAMSpecial function organization blocks OB 254 and OB 255 allow youto transfer data blocks fr
Parameters1. ACCU-1-L-LNumber of the data block to be shifted or duplicated,permitted values: 0 to 255 (0 only for DX or for duplicating DBs)2. ACCU-
ExampleIt is assumed that the data blocks DB3 and DB4 are defined in the usermemory. No DB should yet be present in the DB-RAM other than DB0. Thefoll
Coding floating point numbersCoding a floating point number: 31 30 24 23 22 0V26 ... . ... 20V2-1 ... .
Contents of Chapter 77.1 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7Extended Data Block DX 0The following chapter explains how to use the data block DX 0 andhow it is structured. You will find information about the me
7.1 ApplicationYou can match some of the activities of the system program to yourown particular requirements by selecting settings in DX 0 that differ
7.2 Structure of DX 0DX 0 is made up of the following three parts:•• the start ID for DX 0 (DW 0, 1 and 2) •• several fields of varying lengths (depen
Formal structure: 1B0443D38455Field ID 1Field length 1Field ID 2Field ID n Field length nField length 2ParameterParameterParameterParameterParameter
7.2.1Example of DX 0When assigning parameters in DX 0, remember the following points:•• You can enter individual fields in any order. •• You do not ne
7.3 Parameters for DX 0Field ID/lengthParameters1st/2nd wordMeaning 1)RESTART and RUN:02xx 2)10001001D AUTOMATIC WARM RESTART after POWER UPAUTOMATIC
Field ID/lengthParameters1st/2nd wordMeaning 1)Table 7-1 continued:Interrupt-driven program execution06xx 4)Selection of the processing mode 4)200020
Field ID/lengthParameters1st/2nd wordMeaning 1)Table 7-1 continued:1C001C01Addressing error handlingD System stop when the event occurs and OB 25 is n
Updating the timers•• As standard, the timers T 0 to T 255 are updated.•• If you enter the value "0" in DX 0, no timers are updated, even if
Numbers in BCD codeDecimal numbers are represented as numbers in BCD code. Withtheir sign and three digits, they occupy 16 bits (1 word) in anaccumula
Parameters for interruptprocessingYou can use the table below to find the correct parameter for yourinterrupt processing and you can program DX 0 with
7.4 Examples of Parameter Assignment7.4.1STEP 5 ProgrammingExample A:In multiprocessor operation, you want to use three CPUs: CPU A, B and C.CPU A and
Example B:Assigning the parameters to DX 0 as shown below achieves the following:- the addressing error monitoring is disabled,- the timer updating is
7.4.2Assigning Parametersusing the PG Screen FormFrom stage IV of the PG system software S5-DOS, screen forms areavailable for assigning parameters to
Once you have selected all the parameters in the first screen form foryour application, you can display the second screen form (Fig. 7-3)with the foll
Flowchart for completing theDX 0 screen forms. You will find an example to fill in on the next page.You want to change parameters in form 1?NOYESRep
Example of filling in the DX 0screen formYou want to assign parameters in DX 0 to achieve the following systemprogram response (different from the def
Contents of Chapter 88.1 Structure of the Memory Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 -
8Memory Assignment andOrganizationYou can use this chapter as a reference section to check theorganization of the CPU 928B memory. The chapter also in
8.1 Structure of the Memory AreaThe memory area of the CPU 928B is basically divided into thefollowing areas: Memory area Length WidthUser memory: Fo
Overview of the ChaptersChapter 1This informs you about the areas of application of the S5-135Uprogrammable controller with the CPU 928B and its devic
2.1.5STEP 5 Blocks and Storingthem in MemoryIdentifierA block is identified as follows: •• the block type (OB, PB, SB, FB, FX, DB, DX)and•• the block
8.2 Address Distribution in the CPU 928BFlagsPII/PIQ areaPeripheral I/Os(digital/analogCP/IP)S5 busSystem transfer data (RI/RJ areas),system data (RS/
8.2.1Address Distribution ofthe System RAM FlagsPII/PIQ areaEE00EF00EFFFRJ: extended interface data areaRS: system data areaRT: extended system data
8.2.2Address Distribution of the Peripherals 2048 bits extended peripheralsIM 3 areaIM 4 areaDigital peripherals (with process image),1024 bits inpu
Address areas for theperipherals and theirprogramming With STEP 5 operations, you can access the peripherals either directlyor via the process image
8.3 User Memory Organization in the CPU 928BDepending on the memory submodule you are using, the user memoryconsists of the memory area from 0000H to
8.3.1Block Headers in the UserMemoryEach block in the memory begins with a five word long header.1st word: block start identifier: 7070H2nd word: hi
8.3.2Block Address Lists in DataBlock DB 0Data block DB 0 contains a list with the start addresses of all blocksin the memory submodule or in the DB R
Storing block addresses inDB 0:n = start address of the PB address list (= contents of RS 36)Examples of how to obtain ablock addressAddress PB 0Addre
Determining the start address and length of data block DB 50a) Using indirect memory access::L RS 34 Load the base address of the DB address list:L KB
8.3.3RI / RJ AreaThe RI area is an area 256 words long in the internal system RAM ofthe CPU. It occupies addresses E800H to E8FFH.The RJ area is an ar
Function blocks (FB/FX) You use function blocks to program frequently recurring and/orcomplex functions (e.g. digital functions, sequence control syst
8.3.4RS / RT AreaThe RS and RT areas contain information for the system programmerand system internal data.The RS area is an area 256 words long in th
Assignment of the systemdata in the RS area : reservedAddr.EA1DRS28291516171819202122230134562789101112131424252627PLC software releaseNameInterrupt
EA1EEA27EA36CPU identifier 1 PG interface software release1273954813031323334353637385556596063648079128129130131132133134135136137EA21EA20EA1FEA22EA2
8.3.5Bit Assignment of theSystem Data WordsInterrupt condition codeword (system data RS 0):RS 0Interrupt condition codewordAddress EA00H High byte
RS 1Interrupt condition code reset word ICRWAddress: EA01HRS 1: Active interface, released for userIf you set bit number 9 or bit number 10 of the ICR
Example of UALWThe following example tests whether a module can be addressed at acertain peripheral address. If the module does not exist, ICRW preven
RS 2Interrupt condition code group word ICMK (RS 2):Address: EA02HThe 16 bits of the interrupt condition code group word correspond tothe possible cau
Example of UAMKIf the CPU goes to the stop mode as a result of an addressing error(ADF), ICMK bit number 9 is set. If an operation code error (BCF) oc
RS 5STOP and RESTART IDsAddress: EA05HThe IDs correspond to the control bits in lines 1 and 2 of the ISTACK. High byte: STOP IDsBit no.Assignment15P
RS 6CYCLE and Submodule/MPL IDsAddress: EA06HThe IDs correspond to the control bits in lines 3 and 4 of the ISTACK. High byte: CYCLE IDsBit no.Assig
Block preheaderThe programmer also generates a block preheader (DV, DXV, FV,FXV) for block types DB, DX, FB and FX. These block preheaderscontain info
RS 7RESET IDs/Initialize error IDsAddress: EA07HThe IDs correspond to the control bits in lines 5 and 6 of the ISTACK.High byte: RESET IDsBit no.Assig
RS 8Error IDs HW/SWAddress: EA08HThe IDS correspond to the control bits in lines 7 and 8 of the ISTACK. Bit no. High byte: Error IDs HW15NAU14PEU13B
RS 29Slot ID/CPU/PLC typeAddress: EA1DH Bit no. High byte: Error IDs HW15not used14131211CPU no. 410CPU no. 39CPU no. 28CPU no. 1Bit no. Low byte: E
RS 80 Address: EA50H (high and low):This contains additional information to define the cause of the errorwhen bit 5 is set in RS 8 by the system or w
RS 131Condition codeword "disable all interrupts": see OB 120 (Section 6.5)Address EA83 (low)The system data RS 131 indicates the following
RS 133Process image updatingAddress EA85 (low) Bit no. Low byte: Process image updating7not used6543KM-AUS2KM-EIN1DIGH-EIN0DIGH-AUSBit no. 0 = 0 : n
RS 135Condition codeword "disable individual time interrupts": see OB 121 (Section 6.6)Address EA87The system data RS 135 indicates the foll
RS 137Condition codeword "delay individual time interrupts": see OB 123 (Section 6.8.)Address EA89The system data RS 137 indicates the follo
RS 140 Condition codeword "write and read blocks"Address EA8CSystem data RS 140 indicates whether blocks have been overwritten,newly loaded
RS 144"Alternative loading of data blocks into DB RAM"Address EA90In the CPU 928B, all blocks are first loaded by the programmer intothe use
Block storage The programmer stores all programmed blocks in the programmemory in the order in which they are transferred (Fig. 2-2). Theprogrammer fu
Contents of Chapter 99.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9Memory Access using Absolute AddressesThis chapter explains how to use STEP 5 operations and specialSTEP 5 registers to address data in certain memor
9.1 IntroductionThe STEP 5 programming language contains operations with whichyou can access the entire memory area. These operations belong to the&qu
015Pages71024 bytes/words2048 bytes/words0000HF000HF400HFBFFFC00HFFFFHFEFFHSelect registerThe global memoryis an external memoryshared by all CPUs
Memory accessWith the following operations, you can access local or global memoryareas using absolute addresses (see also Fig. 9-2).Access to the loca
no access possiblea) LIR, TIR, TNB, TNW b) LRW, TRW, LRD, TRDaccess possiblec) LY GB, LY GW, LY GDTY GB, TY GW, TY GD, (TSG)d) LW GW, LW GDTW GW, TW
9.2 Access using the Address in ACCU 1ApplicationRegisters are memory cells used by the CPU to execute a STEP 5program. Every register is 16 bits wide
9.2.1LIR/TIR: Loading to or Transferring from a 16-BitMemory Area IndirectlyThe following table shows which register numbers you can use withthe CPU 9
Figures 9-3 and 9-4 illustrate the difference between LIR/TIR accessto word and byte-oriented areas: 15 015015 0ACCU 1ACCU 1Register nRegister naddr
Registers 0 to 3 and 9 to 12:ACCU 1, 2, 3 and 4During program execution, the CPU uses the accumulators as buffers.Using the TIR operation, you can tra
2.2 Program, Organization and Sequence BlocksProgram blocks (PBs), organization blocks (OBs) and sequenceblocks (SBs) are the same with respect to pro
It changes if one of the following occurs:•• another data block is opened or •• the program returns to a higher level block after a new data blockwas
NoteIf you manipulate the DBA register as shown in example 1, theDBL register is not changed. This means that transfer errormonitoring can no longer b
Register 8: DBL = DataBlock LengthIn addition to the DBA register, a DBL register is loaded every time adata block is called. This contains the length
ExampleRegister 15: SAC = StepAddress CounterDuring STEP 5 program execution, register 15 contains the absoluteaddress of the operation in the program
9.2.2Examples of using theRegistersExample 1: You want all the data words of a data block to contain a constant.The program shown below writes the co
Example 1 continued:CONT : . ...after all data words have been: written to:BEUNIVO : . ...if DB 50 does not exist: or has no data words:BENote: The s
9.3 Transferring Fields of MemoryApplicationYou can use the system operations TNB and TNW to transfer fields ofmemory (max. 255 bytes with TNB, max. 2
Addresses Memory areaTable 9-4 continued:8000H to DD7FHDD80H to E3FFHE400H to E7FFHE800H to EDFFHEE00H to EFFFHF0000H to FFFFHSystem RAM:DB-RAM (16 bi
TNB and TWN between 8 and16 bit memory areas 70AddressesinByte 5Byte 4Byte 3Byte 2Byte 1Source/destinationTransfer of bytes 1 to 5: Trans
9.3.1Example of TransferringMemory Fieldsa) TaskYou want to copy a field of maximum 4095 data words from a DB or DX datablock to a different DB or DX
Block calls can be unconditional or conditional as follows:Unconditional callThe "JU" statement belongs to the unconditional operations. It
Example 1 continued:b) Program structure:FB 10 is made up of five program sections with the following tasks:- Input parametersa) Check that the source
Example 1 continued:b) Programming function block FB 10Note:If you want to copy from data word DW 0, the program sections shownin heavy print can be o
Example 1 continued:: BEGINNING OF SOURCE DATA BLOCK:L FW 254 TYPE AND NUMBER OF SOURCE DATA BLOCK:JU OB 181 TEST DATA BLOCK:JC =F003 JUMP, IF BLOCK
Example 1 continued:: BEGINNING OF TRANSFER:L KB 0 COMPARISON VALUE:L FY 246 FIELD LENGTH, HIGH BYTE:!=F FIELD LENGTH >= 256 WORDS ?:SLW 1 MULTIPLI
9.4 Operations with the Base Address Register (BR Register)ApplicationThe BR register (base address register, 32 bits) is used by the load andtransfer
Operations with the Base Address Register (BR Register)9.4.1Operations for Transferbetween RegistersApplicationYou can use the operations described in
9.4.2Accessing the LocalMemoryApplicationWith the following operations, you can access the local memoryorganized in words using an absolute memory
Operation Operand DescriptionTable 9-7 continued:TRDConstant(-32768 to+32767)add the specified constant to contentof the BR register and transfer the
The CPU tests and sets a busy location using the TSG operation.Operation Operand ExplanationTSG -32768 to+32767Add the specified constant to theconte
Load and transferoperations for the globalmemory organized in bytes Operation Operand DescriptionLY GBLY GWLY GDTY GBTY GWTY GD-32768 to+32767-327
Effect of the BE statementAfter the "BE" statement (block end), the CPU continues the userprogram in the block in which the block call was p
Error reactionIf the calculated address of the memory location is not in the rangeshwon, the CPU detects a runtime error and calls OB 31, providing it
9.4.4Accessing the Page MemoryApplicationUsing the following operations, you can access pages organized inbytes or words via an absolute memory addres
Opening a pageOperation Operand ExplanationACR Open the page whose number islocated in ACCU-1-Lpermitted values: 0 to 255Error reactionThe page number
ResultYou can evaluate the result of the TSC operation in condition codesCC 0 and CC 1, as follows:CC 1 CC 1 Explanation010001The busy location contai
Operation Operand ExplanationTable 9-10 continued:TY CBTY CWTY CD-32768 to+32767-32768 to+32767-32768 to+32767add the specified constant to content
Load and transferoperations for pagesorganized in words Operation Operand ExplanationLW CWLW CDTW CWTW CD-32768 to+32767-32768 to+32767-32768 to+
Contents of Chapter 1010.1 Multiprocessor Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.6 SEND TEST Function (OB 203) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 - 4310.6.1 Function . . . . .
10Multiprocessor Mode and CommunicationAt the beginning of this chapter, you will see when you can use themultiprocessor mode and which data exchange
10.1 Multiprocessor ModeDefinitions of termsYou are in multiprocessor mode as soon as you plug in a coordinatormodule, regardless of how many CPUs or
Organization blocks for controlling program executionBlock Function and call criterionOB 1 Organization of cyclic program execution;first call afte
10.1.3Exchanging Data via IPCFlagsInterprocessor communication (IPC) flags are available for cyclicexchange of binary data. They are used mainly for t
ExampleNote- The only flag bytes that you can specify as IPC flags are the ones enabled on the coordinator or on the CP(s).- A flag byte that is defin
Data exchange betweenCPUs and communicationprocessors If you want to exchange data between one CPU and one CP, you mustenable the necessary number o
Transmitting IPC flags inmultiprocessor operationAt the end of each program cycle, along with the updating of theprocess image, the CPU transmits the
10.1.4I/O Flag Assignment andIPC Flag Assignment inMultiprocessor Mode (DB 1)The I/O area of the programmable controller is available only once onthe
3. Enter the values by pressing the enter key on the PG.The PG then generates DB 1. 4. Transfer DB 1 to the CPU or load it into an EPROM submodule.No
2. Type in the individual operand areas (from data word 3 onwards).Before each operand area, you must specify an ID. The possible ID words are as foll
Entering DB 1The system program adopts DB 1 during a cold restart. The systemprogram checks to see if the inputs and outputs or IPC flags indicatedin
10.2 Multiprocessor CommunicationDefinitionMultiprocessor communication means the exchange of largeramounts of data (data blocks) between CPUs operati
The data block in the receiving CPU can be longer or shorter than thedata block to be sent. It is, however, important that the data wordstransferred b
Organization blocks to control the start-up procedureBlock Function and call criterionOB 20Call on request for COLD RESTART (manualand automatic)O
10.2.3Why Data is BufferedGenerally, the multiprocessor mode is used to distribute tasks onseveral CPUs. Since the tasks are not identical and the per
10.2.4How the Buffer isProcessed and ManagedPrincipleThe buffer is based on the FIFO principle (first in - first out, queueprinciple). The data is rec
ExampleOccupation of the buffer by a linkThe link between CPU 3 and CPU 2 is initialized. The link is assignedseven memory fields in the buffer of the
SummaryBuffering data on the coordinator COR 923C allows the asynchronousoperation of transmitting and receiving CPUs and compensates fortheir differe
10.2.5System Start-UpIf you require multiprocessor communication, then all CPUs involvedmust go through the same STOP-RUN transition (= RESTART), i.e.
10.2.6Calling Communication OBsProceed as follows: 1. Call the INITIALIZE function only in the cold restartorganization block OB 20 on one CPU. 2. Cal
Results bitsThe results bits (CC 1/CC 0, RLO etc.) are influenced by thecommunication OBs. For more detailed information refer to Section 10.2.8.Chang
Call parametersFor all communication OBs the number of the first flag byte in thedata field (= pointer to data field) in ACCU-1-L is transferred as th
Condition codesEvaluation MeaningRLO CC 1 CC 00 0 0 JC= Function executedcompletely and correctly1 0 0 JC= Function aborted,pointer to data fieldille
The first byte in the field of the output parameters (condition codebyte) also indicates whether or not a function has been correctly andcompletely ex
Organization blocks for reactions to device or program errors 1)Block Function and call criterionTable 2-3 continued:OB 34Error in closed loop control
ExampleInitialization conflictAn initialization conflict can only occur with the INITIALIZATIONfunction. If a conflict occurs, you must modify the pro
Cond.codebyteSignificanceTable 10-3 continued:41 The assignment list in the data block is not correctlystructured.42 The sum of the assigned memory fi
Cond.codebyteSignificanceTable 10-4 continued:68 The management data (queue management) of theselected links are incorrect; set up the buffer in theco
Warning The function could not be executed; the function call must berepeated, e.g. in the next cycle.Warning numbers (evaluation of the condition cod
10.3 Runtimes of the Communication OBsThe "runtime" is the processing time of the special functionorganization blocks; the time from calling
Transfer timeAn important factor of a link (e.g. from CPU 1 to CPU 2) is the totaldata transfer time. This is made up of the following components:•• t
10.4 INITIALIZE Function (OB 200)10.4.1FunctionTo transfer data from one CPU to another CPU, the data must betemporarily buffered. The INITIALIZE func
If you are using four CPUs, there are twelve links:The INITIALIZE function specifies how the total of 48 availablememory fields are assigned to the ma
10.4.2Call ParametersStructure of the (parameter)data fieldBefore calling OB 200, you must supply the input parameters in thedata field. OB 200 requir
Block ID, block number,address assignment listThe parameters are only relevant if you select the "manual" mode.You must then create an assig
Chapter 6This covers the special functions integrated in the system program. Ittells you how to use the special functions and how to call and assignpa
2.2.2Organization Blocks forSpecial FunctionsThe following organization blocks contain special functions of thesystem program. You cannot program thes
Assignment listWith the assignment list, you specify how many of the existing 48memory fields are to be assigned to the links. The list is not changed
Example 10.4.4Output ParametersCondition code byteThis byte informs you whether the INITIALIZE function wasexecuted correctly and completely.Initializ
Cond.codebyteSignificance33 The pages required for multiprocessor communication(numbers 252 to 255) are not or not all available.34 The pages required
10.5 SEND Function (OB 202)10.5.1FunctionThe SEND function transfers a data field to the buffer of the COR 923C coordinator. It also indicates how man
Block IDID = 1: DB data blockID = 2: DX data blockID = 0 or 3 to 255: illegal, causes an error messageBlock numberThe block number, along with the blo
The following situations are possible:•• DB is longer than source area:If the data block is sufficiently long, you obtain a 32-word longarea per fiel
Errors When the SEND function is called, the following error numbers(evaluation of the condition code byte) can occur:Conditioncode byteSignificance65
WarningThe function could be executed; the function call must be repeated,e.g. in the next cycle.The following warning numbers (evaluation of the cond
10.6 SEND TEST Function (OB 203) 10.6.1FunctionThe SEND TEST function determines the number of free memoryfields in the buffer of the COR 923C coordin
Initialization conflictHas no significance for the SEND TEST function.ErrorsWhen calling the SEND TEST function, the following error numbers(evaluatio
Integral organization blocks with special functionsBlock: Block function:Table 2-4 continued:OB 223 Compare restart typeOB 224 Transfer blocks of IPC
10.7 RECEIVE Function (OB 204)10.7.1FunctionThe RECEIVE function takes a data field from the buffer of theCOR 923C coordinator. It also indicates how
10.7.4Output ParametersCondition code byteThis byte informs you whether the RECEIVE function was executedcorrectly and completely. Initialization conf
Conditioncode byteSignificanceError numbers continued:70 The block number supplied by the transmitter is illegal,since it is a data block with a speci
Block ID:ID = 1: DB data blockID = 2: DX data blockID = 0 or 3 to 255: illegal, causes an error messageBlock numberBlock number of the DB/DX in which
10.8 RECEIVE TEST Function (OB 205)10.8.1FunctionThe RECEIVE TEST function determines the number of occupiedmemory fields in the buffer of the COR 923
ErrorsWhen calling the RECEIVE TEST function, the following errornumbers (evaluation of the condition code byte) can occur:Conditioncode byteSignifica
10.9 ApplicationsBased on examples, this section explains how to programmultiprocessor communication. NoteIf you use the function blocks listed below
NoteThe following examples of applications involve finished applicationsthat you can program by copying them.Programming functionblocksFB 200: initial
FB 200 continuedFB 200 LEN=45SEGMENT 1 0000NAME:INITIALDECL :AUMA I/Q/D/B/T/C: I BI/BY/W/D:BYDECL :NUMC I/Q/D/B/T/C: I BI/BY/W/D:BYDECL :TNAS I/Q
FB 202: Sending a data fieldFB 202SEND (1) RCPU ERWA (4) (2) TNDB TCAP (5) (3) FINOParameternameSignificance ParametertypeData typeParameterfieldRC
2.3 Function BlocksFunction blocks (FB/FX) are also parts of the user program just likeprogram blocks. FX function blocks have the same structure as F
FB 203: Testing the transmitting capacityFB 203SEND-TST (1) RCPU ERRO (2) TCAP (3)ParameternameSignificance ParametertypeData typeParameterfieldRCP
FB 204: Receiving a data fieldFB 204RECEIVE (1) TCPU ERWA (2) RCAP (3)TNDB (4)STAA (5)ENDA (6)ParameternameSignificance ParametertypeDatatypeParame
FB 204 continued:FB 204 LEN=45SEGMENT 1 0000NAME:RECEIVEDECL :TCPU I/Q/D/B/T/C: I BI/BY/W/D:BYDECL :ERWA I/Q/D/B/T/C: Q BI/BY/W/D:BYDECL :RCAP I/Q/D/
10.9.2Transferring Data BlocksIn this example, the function block TRAN DAT (FB 110) transfers aselectable number of data fields from a data block in o
FB 110 continued:If, however, the REST output parameter has a value greater than zero,this means that the function block must be called again, for ex
FB 110 continued:ParameternameSignificance ParametertypeDatatypeSTARRCPUTNDBNUMBFIRBERRORESTCUBN 1)EDGF 1)Start the transfer of the data block on a po
FB 110 continued:0025 :L =REST First send any remaining 0026 :L KB 0 data fields0027 :><F0028 :JC =TRAN0029 :002A :AN =STAR Positive edge at sta
Application of FB 110Application of FB 110TaskYou want CPU 1 to transfer data blocks DB 3 (data fields 2 to 5) and DB 4(data fields 1 to 3) to CPU 2 d
Application example continued:0009 :JU FB 110000A NAME :TRAN-DAT000B STAR : I 2.0000C RCPU : FY 0000D TNDB : FW 1000E NUMB : FY 3000F FIRB : FY 40010
10.9.3Extending the IPCFlag AreaThe problemIn the S5-135U/155U programmable controllers, each of the 256 flagbytes of a CPU can become an input or out
2.3.1Structure of FunctionBlocksThe block header (five words) of a function block has the samestructure as the headers of the other STEP 5 block types
The solutionConsecutive data words of a DB or DX data block are defined fromDW 0 onwards as "IPC data words". Each link is assigned its ownd
Structure of thelink list SUB-LIST 1 SUB-LIST 2Link DB type DBnumberNo. of datafieldsfrom CPU 1 to ...DW 0S 1DW 16S 1... CPU 2 DW 1 ... ... DW 172...
The link consists of two similarly structured sub-lists, each with 16 datawords. For each of the four sender CPUs (S1, S2, S3, S4) three entries arere
Program structureDuring restart, one of the CPUs calls the INITIALIZE function (OB 200) to reserve exactly the same number of coordinator memoryfields
OB 20Restart OB to reservethe buffer on the923C coordinatorJU OB 200BECyclic user programextended by the calls forthe RECV-DAT and SEND-DATfunction bl
Programming functionblocksFB 100: Sending data word areasBefore you call FB 100, the data block containing the link list must beopen. The function blo
FB 100 continued:0013 :0014 :SLW 2 CPUN = CPUN * 40015 :T FY 245 Base address0016 :0017 :L KB 10018 :T FY 244 Link counter0019 :001A LOOP :L FY 245 B
FB 100 continued:0048 EMPT :L FY 244 Increment0049 :I 1 link counter004A :T FY 244004B :L KB 4 All links004C :<F processed ?004D :JM =LOOP004E :L
FB 101 continued:FB 101 LEN=88SEGMENT 1 0000NAME:RECV-DATDECL :CPUN I/Q/D/B/T/C: D KM/KH/KY/KS/KF/KT/KC/KG:KFDECL :ERWA I/Q/D/B/T/C: Q BI/BY/W/D:
FB 101 continued:0037 :L FY 249 Receiving capacity = number 0038 :L FY 243 of reserved0039 :><F memory fields ?003A :JC = EMPT003B :003C RECV :L
The memory contains all the information that the programmer needsto represent the function block graphically when it is called and tocheck the operand
Application exampleApplication of FB 100/101TaskYou want to exchange data between three CPUs:- From CPU 1 to CPU 2: data block DB 3, DW 0 to DW 127 (=
Application example continued:Implementation1. Loading blocksThe following blocks must be loaded in the individual CPUs:Function CPU 1 CPU 2 CPU 3Rest
Application example continued:– – Sub-list 1 – –16: KS = ’S1’; Send from CPU 1 to ..17: KY = 002,004; .. CPU 2 (four data fields)18: KY = 003,002; ..
Application example continued:4. Program calls for the function blocks in FB 1 of the CPUs:The user program on each CPU is extended by the RECV-DAT an
Contents of Chapter 1111.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11PG Interfaces and FunctionsThis chapter explains how to connect your PG to the CPU 928B andthe functions provided by the PG software with which you
11.1 OverviewYou can load and test your user program using the online functions ofthe STEP 5 software.To use these functions, the CPU must be connecte
11.2 PG FunctionsNoteThe terms used in this section for the PG functions may in somecases differ from the terms in your PG software. Please refer to y
WAIT STATESo far you have come across the modes STOP, RESTART and RUN.When using the online function PROGRAM TEST, the CPU has afourth mode, the WAIT
Output addressWith the "output address" function, you can display the contents ofmemory and I/O addresses in hexadecimal format. You can acc
2.3.2Programming FunctionBlocksYou can program a function block only in the "statement list"method of representation. When entering a functi
CautionAfter COMPRESSING memory in the STOP mode, you can onlyrestart with a COLD RESTART. The ISTACK and BSTACK arenot updated.Power down duringcompr
Delete blockWith this function you declare a logic or data block in the usermemory as invalid. A block will only be declared invalid when it isnot bei
Status blockYou can call the "status" PG function to test related operationalsequences (STEP 5 operations) in one block at any location in t
Program test You can call the "program test" function to test individual programsteps anywhere in your user program. When you do this, you s
Executing the function andspecifying another breakpointInitial situation: the CPU is in the WAIT STATE.To continue the function, you have two possibil
Cancelling the breakpointIf a specified breakpoint has not yet been reached, you can cancel itby pressing the break key on the PG. The CPU then change
If requests such as PEU, MP-STP, stop switch etc. occur during theWAIT STATE, these are only registered. These can become activeimmediately after
Interruptions •• Program processing (RESTART/RUN) → STOP mode:If an interruption occurs during program processing (e.g.,multiprocessor stop, I/O not r
Status variablesUsing the "status variables" function, you can display the currentsignal states of certain operands (process variables).The
ForceUsing the FORCE function you can set the output bytes of theprogrammable controller to a particular signal state directly (avoidingthe process im
NoteIf you change the order or the number of formal operands in theformal operand list, you must also update all STEP 5 statementsin the function bloc
11.3 Activities at CheckpointsThe table below shows you which activities of the PG functions areexecuted at the checkpoints. Activities of the onlin
11.4 Serial Link PG - PLC via 1st or 2nd Serial InterfaceFor the serial link PG - PLC there are the following possibilities:•• Direct link to the CPU
11.5 Parallel Operation of Two Serial PG InterfacesYou can use the second interface on the CPU 928B (SI 2) as a PGinterface in exactly the same way as
Examples of configurations CPU 928BCP 143SINEC H1SI1PG connected via SINEC H1 and COR CSI2"swing cable"PG connected directlyFig. 11-3 First
11.5.1InstallationTo use the second interface of the CPU 928B as a PG interface,follow the steps outlined below:Step Action1 Install the PG submodule
The table below lists the pairs of functions that you cannot work withsimultaneously. Function activeon the first PG:You must not activate this functi
11.5.3Sequence in Certain Operating SituationsParallel operation withshort-running functionsIf you work with PGs on both interfaces simultaneously, bo
Parallel operation withlong-running functionsThe long-running functions "force" and ""program test" cannotinterrupt other fun
To allow a second PG to send a job to the CPU, the status function isinterrupted between two requests and then continued on completion ofthe inserted
PG 1 informs the CPUof the variablesto be output.PG 1 requests thecurrent data.PG 1 requests thecurrent data.PG 1 requests thecurrent data.PG 1 reque
2.3.3Calling Function Blocks andAssigning Parameters tothemYou can call every function block as often as you want anywhere inyour STEP 5 program. You
Special feature with cyclicfunctions on both PGsIf the interrupting function blocks the CPU 948 ("status" in a blockthat is not executed) th
Contents of Chapter 12Appendix 1: Technical Data of the CPUs in the S5-135U. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 -
12AppendixThis chapter gives you additional information on the CPU 928B, suchas runtime comparison between the CPU 922, CPU 928 and CPU 928B, error ID
Appendix 1: Technical Data of the CPUs in the S5-135UOperation / processing CPU 922 CPU 928 CPU 928BTypical operation execution times for bit operatio
Operation / processing CPU 922 CPU 928 CPU 928BInterrupt-driven program processingExtension of the cycle time byinserting an empty OB 2(without STEP 5
Operation / processing CPU 922 CPU 928 CPU 928BSize of the memorySize of the user memory(in Kbytes) per submodule 64 64 64Size of the memory for data
Appendix 2: Error IdentifiersError IDs in SystemData RS 3 and RS 4RS 3 RS 4 ExplanationStructure of the block address lists (Evaluation of DB 0)8001H
RS 3 RS 4 ExplanationEvaluation of DB 20421H0422H0423H0424H0425H0426HDByyHFByyHFByyHFByyHDByyH-Data yy = number of the non-loaded data block Function
RS 3 RS 4 ExplanationEvaluation of DX 2 (continued)045BH045CH045DH045EH045FH0460H0461HxxyyHxx00HxxyyHxx00HxxyyHxxyyHyyyyHBlock for send mail box 7 job
Error IDs in ACCU 1 and ACCU 2ACCU-1-LACCU-2-L ExplanationOB calledREG-FE (closed loop controller error)0801H0802H0803H0804H0805H0806H0880HDByyHDByyHF
Permitted actual operandsWhich operands can be assigned as actual operands is shown in thefollowing table. ParametertypeData type Actual operands pe
ACCU-1-LACCU-2-L ExplanationOB calledBCF (operation code error)1811H1812H1813H1814H1815H–––––Operation with illegal opcode Illegal opcode for an opera
ACCU-1-LACCU-2-L ExplanationOB calledLZF (runtime rror)/load or transfer error1A11H1A12H1A13H1A14H1A15H1A16H1A17H1A18H1A19H–––––––––Access to a non-de
ACCU-1-LACCU-2-L ExplanationOB calledLZF (runtime error)/other runtime errors (continued)1A34H1A34H1A34H1A34H1A35H1A36H1A3AH1A3BH1A41H1A42H1A43H1A44H1
ACCU-1-LACCU-2-L ExplanationOB calledLZF (runtime error)/other runtime errors (continued)1A4DH1A4DH1A4DH1A4DH1A4DH1A4DH1A4DH1A4DH1A4DH1A4DH1A4DH1A4DH1
ACCU-1-LACCU-2-L ExplanationOB calledLZF (runtime error)/other runtime errors (continued)1A58H1A59H––Error indicated for .../by ... :TNW/TNB: the sour
Appendix 3: STEP 5 Operations not Contained in the CPU 928BPlease note that the following STEP 5 operations belonging to theCPU 946/947 and CPU 948 ca
Appendix 4: Identifiers for the Program Processing LevelsThe identfiers correspond to the identifiers entered in the ISTACKunder LEVEL (hexadecimal).I
Appendix 5: Example "ISTACK Evaluation"This (simplified) example illustrates how to evaluate the ISTACK.For more detailed information, you s
It is possible that the system program has detected a runtime error andthat the corresponding error organization block is not programmed. Sincethere a
You can now move on in the ISTACK to depth 02:The identifier 0004 (after LEVEL) tells you that this is the ISTACK ofthe interrupted program processing
ParametertypeData type Actual operands permittedTable 2-6 continued:D(Cont.)KF for a fixed point number-32768 to +32767KG for a floating point number1
Following the search, you can see the operation "C DB 6", thatcaused the interruption; there is no data block with the number 6 inthe user m
13Further Reading13CPU 928B Programming GuideC79000-A8576-C898-0113 - 1
Further Reading/1/ S5-135U/155UCPU 922/CPU 928/CPU 928B/CPU 948Pocket GuideOrder no. 6ES5 997-3UA22/2/ S5-135U/155U System Manual Order no. 6ES5 998-0
/8/ Programmable ControllersBasic ConceptsSIEMENS AGOrder no. E80850-C293-X-A2/9/ Catalog ST 59: ProgrammersSIMATIC S5/10/ Catalog ST 54.1: Programmab
Contents of Chapter 14List of Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Abbreviations(An explanation of the ISTACK abbreviations can be found in Section 5.4)ACCU-1 (2, 3, 4)-L low word in accumulator 1 (2, 3, 4), 16 bitACC
KB call for a non-existent logic blockKDB opening a non-existent DB/DX data blockLAD ladder diagramLED light-emitting diode NAU power failureOB organi
IndexAAccumulators (ACCUs) 3-15, 6-15Actual operandsof function blocks 2-31Addressing 1-16ADF (addressing error) 5-29, 5-53Arithmetic operations 3-56A
structure 2-37validity 2-40Data word 1-15, 2-37, 2-41DBA (data block start address) 9-11DBL (data block length) 9-14Decimal numbers 2-8Decrementing 3-
digital 3-50LZF (runtime errors) 5-43, 5-45MMantissaSee floating point numberMANUAL WARM RESTARTSee WARM RESTARTMemory accessgeneral 9-4via the BR reg
Chapter 13This lists documentation for further reading.Chapter 14This is intended to help you find themes quickly and contains a list ofabbreviations
Examples Example 1: the following (complete) example is intended to furtherclarifythe programming and calling of a function block and theassignment of
system program 1-8, 6-95 - 6-97user program 1-10Program blocks (PB) 2-13, 2-17Program processing levelsgeneral 6-16, 6-22level number 6-98Programmingg
Timer value 3-27Timers T 1-15Transfer operations 3-21, 3-54Transferring fields of memory 9-18 - 9-25UUser checkpoints 11-5User interfacefor clock-driv
List of TablesTable 2-1 Overview of the organization blocks for program execution . . . . . . . . . . . . . . . . . . . . . 2 - 20Table 2-2 Overview
Table 3-13 Set/reset operations with formal operands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 - 51Table 3-14 Timer an
Table 5-7 ISTACK IDs CAUSE OF INTERRUPT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 - 22Table 5-8 The organization blo
Table 6-1 Overview of the special functions available with the CPU 928B . . . . . . . . . . . . . . . . . . . 6 - 6Table 6-2 OB 150 error IDs . . . .
Table 8-11 Assignment of RS 132 (Delay all interrupts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 - 29Table 8-12 Assignment
Table 10-7 Assignment list for OB 200 (initialize) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 - 35Table 10-8 Link lis
List of FiguresFig. 1-1 Tasks of the system program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 -
Fig. 4-7 Process interrupt, level triggered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 - 41Fig. 4-8 Proce
Example 2: calling a function block and assigning parameters to it withthe STL and CSF/LAD methods of representation in a program block.STL method of
Fig. 6-15 ACCU contents before calling OB 218 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 - 87Fig. 6-16 Schematic sh
Fig. 9-7 Occupation of the accumulators during the program . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 17Fig. 9-8 Transferring blocks
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2.3.4Special Function BlocksApart from the function blocks that you program yourself, you canorder standard function blocks as a finished software pro
Using FB 0If you have not programmed organization block OB 1, the systemprogram calls FB 0 (provided it is loaded) cyclically instead of OB 1. Since y
2.4 Data BlocksData blocks (DB) or extended data blocks (DX) are used to store thefixed or variable data with which the user program works. No STEP 5o
Block headerThe block header occupies five words in the memory and containsthe following:•• the block identifier•• the programmer identifier•• the blo
2.4.1Creating Data BlocksTo create a data block, perform the following steps:Step Action1 Enter the block type (DB/DX) and data block numberbetween 3
2.4.2Opening Data BlocksYou can only open a data block (DB/DX) unconditionally. This ispossible within an organization, program, sequence or function
NoteBefore accessing a data word, you must open the data block yourequire in your program. This is the only way that the CPU canfind the correct data
Example 2: range of validity of data blocks (Fig. 2-5)Data block DB 10 is opened in program block PB 7 (C DB 10). During the subsequent programexecut
Conventions used in the textTo provide you with an overview of the contents of the pages, themanual uses the following conventions in addition to a 2n
2.4.3Special Data BlocksOn the CPU 948 data blocks DB 0, DB 1, DX 0, DX 1 and DX 2 arereserved for special functions. They are managed by the systemp
DX 0•• Data block DX 0 (see Chapter 7)If you assign parameters to data block DX 0 and load it, you canchange the defaults of certain system program fu
Contents of Chapter 33.1 Principle of Program Execution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 -
3.5.4 Executive Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 - 58Jump operati
3Program ExecutionThis chapter is intended for readers who do not yet have any greatexperience in using the programming language. The chapter therefor
3.1 Principle of Program ExecutionYou can process your STEP 5 user program in various ways.Cyclic program execution is most common with programmableco
3.2 Program OrganizationProgram organization allows you to specify which conditions affect theprocessing of your blocks and the order in which they ar
PB ‘B‘OB1 PB’A’ FBFBGo to initialstateStop to the systemEMERGENCYOFFPB ‘D‘Message outputFBMessage outputvia standardperipheralsFBMessage outputvia sta
OB1JU PB ‘X‘JU PB ‘Y‘BEControlledsystem part ‘Z‘PB ‘X‘Controlledsystem part ‘X‘FBIndividual controlFBClosed loop controlFXSignallingControlledsystem p
Nesting blocksFig. 3-4 shows the principle of nested block calls.Block addressesA block start address specifies the location of a block in the usermem
Reference tablesSpecific information you may require at any time is contained innumbered tables as shown in the following example and can be foundin t
Nesting depthYou can only nest 62 blocks within one another. If more than 62blocks are called, the CPU signals an error and goes to the stop mode.Exam
3.3 Storing Program and Data BlocksYou must load your program into the user memory so that the CPUcan process it. As program memory you can use a plug
3.4 Processing the User ProgramThe complete software on the CPU (consisting of the system programand the STEP 5 user program) has the following tasks:
Reactions to interrupts and errorsTo allow you to specify the reactions to interrupts or errors, specialorganization blocks (OB 2, OB6 and OB9 to OB 1
Cycle time monitoringThe CPU monitors the cycle time in case it exceeds a maximum value.The standard setting for this maximum value is 150 ms. You can
Interrupt eventsCyclic program execution can be interrupted by the following: •• process interrupt-driven program processing,•• time-controlled progra
3.5 STEP 5 Operations with ExamplesA STEP 5 operation consists of the operation and an operand. Theoperation specifies what the CPU is to do (operatio
•• Arithmetic operations combine the contents of ACCU 1 with thoseof ACCU 2, write the result to ACCU 1 and transfer the contentsof ACCU 3 to ACCU 2 a
Example of ERAB Other bit condition codes•• RLO Result of logic operationThis is the result of bit logic operations. It is the truth statement forco
•• CC 1 and CC 0 These are the result condition codes that you can interpret from thefollowing table:NoteTo evaluate the condition codes directly, com
Contents of Chapter 11.1 Area of Application for the S5-135U with the CPU 928B. . . . . . . . . . . . . . . . . . . . . . . . 1 - 41.2 Typical Mode o
3.5.1Basic OperationsYou can use the basic operations in all logic blocks and all methods ofrepresentation (STL, LAD, CSF).Binary logic operations O
Within a sequence of logic operations, the RLO is formed from the typeof operation, previous RLO and the scanned signal state. A sequence oflogic oper
Load and transferoperations Operation Operand FunctionLTIB 0 to 127IW 0 to 126ID 0 to 124QB 0 to 127QW 0 to 126QD 0 to 124FB 0 to 255FW 0 to 254FD 0
Operation Operand FunctionLKB 0 to 255KS 2 ASCIIcharactersKF -32768 to+32767KG1)KH 0 to FFFFDH 0 toFFFF FFFFKM 16-bit patternKY 0 to 255 foreach byteK
Examples of load andtransfer operationsExample 1:Fig. 3-6 illustrates loading/transferring a byte, word or double wordfrom/to a memory area organized
NoteLoad operations do not affect the condition codes. Transfer operations clear the OS bit.When a byte or word is loaded the extra bits are cleared i
Addressing I/OsYou can use load and transfer operations to address the I/Operipherals as follows:•• directly using the following operations:L../T.. .
Timer and counteroperationsTo load a timer using a start operation or a counter using a setoperation, you must first load the value in ACCU 1.The foll
Timer valueWith the operation L KT, you can load a timer value directly intoACCU 1 or indirectly from a flag or data word. The value must havethe foll
Counter valueWith the operation L KC, you can load a counter value directly in ACCU 1 or indirectly from a flag or a data word. The value must havethe
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