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Example
Note
- The only flag bytes that you can specify as IPC flags are the ones
enabled on the coordinator or on the CP(s).
- A flag byte that is defined on one or more CPUs as an IPC
input
flag byte must be defined as an IPC
output flag byte on one other
CPU or CP. An
IPC output flag byte is only allowed on one CPU,
but this may be used as an IPC input flag in all other CPUs in the
rack.
- If you have flag bytes that you have not defined as IPC flags in a
CPU, you can use them as normal flags!
You cannot use S flags as IPC flags!
CPU 1
IPC output flags:
FY 96 to FY 119
IPC input flags:
FY 120 to FY 125
CPU 2
Coordinator
IPC output flags:
FY 120 to FY 125
IPC input flags:
FY 96 to FY 119
Write
Read
Write
Read
Enabled area
per jumpers:
IPC flag bytes
FY 96 to FY 127
Fig. 10-1 Transferring IPC flags in the multiprocessor mode
Multiprocessor Mode
CPU 928B Programming Guide
10 - 6 C79000-B8576-C898-01
- CPU 928B 1
- Copyright 2
- Disclaimer of liability 2
- Safety-related guidelines 2
- How to use this Manual 3
- Overview of the Chapters 4
- Chapter 13 6
- Chapter 14 6
- How to Use this Manual 6
- Conventions used in the text 7
- Method of representation STL 8
- 1Introduction 10
- SIMATIC S5 family 11
- Suitability 11
- CPU 928B Programming Guide 12
- C79000-D8576-C898-01 12
- 1. 2. 3 13
- Processing according to 14
- 1.3 The Programs in a CPU 15
- User interfaces 16
- Default system reaction 16
- Modifying the defaults 16
- The Programs in a CPU 16
- User program 17
- Storing the user program 19
- Interfaces to the system 19
- Process image of the inputs 20
- I/O area (P area) 20
- F flags 21
- S flags (extended flag area) 21
- Timers (T) 22
- Counters (C) 22
- Relative addressing 23
- Absolute addressing 23
- Current data block 23
- 1.6 How to Tackle Programming 24
- Notes on the scope of 25
- Note on test strategies 26
- 1.7 Programming Tools 27
- •• Use as slave in 28
- User Program 29
- 2User Program 30
- The LAD, CSF, STL 31
- Methods of Representation 31
- Structured Programming 32
- :O F 54.1 33
- Number Representation 35
- 16-bit and 32-bit fixed 36
- Floating point numbers 37
- Coding floating point numbers 38
- Permissible numerical range 38
- Input/output on PG 38
- STEP 5 Programming Language 38
- Numbers in BCD code 39
- Block types 40
- Formal structure of the 41
- Block preheader 42
- Maximum length 42
- Available blocks 42
- Block storage 43
- Correcting and deleting 43
- Programming 44
- Block calls 44
- Unconditional call 45
- Conditional call 45
- Organization Blocks as 46
- User Interfaces 46
- 2 - 20 C79000-B8576-C898-01 47
- 2 - 22 C79000-B8576-C898-01 49
- Organization Blocks for 50
- Special Functions 50
- 2 - 24 C79000-B8576-C898-01 51
- 2.3 Function Blocks 52
- Structure of Function 53
- "calling and assigning 54
- How to program 54
- Function Blocks 54
- Programming Function 55
- Formal operands 56
- Calling Function Blocks and 57
- Assigning Parameters to 57
- Permitted actual operands 58
- ±0.1469368 x 10 59
- ±0.1701412 x 10 59
- Q 6.0 61
- Continued on the next page 62
- 2.4 Data Blocks 64
- Block header 65
- Block body 65
- Data Blocks 65
- Creating Data Blocks 66
- Opening Data Blocks 67
- Special Data Blocks 70
- Program Execution 72
- 3Program Execution 74
- 3 - 4 C79000-B8576-C898-01 75
- 3.2 Program Organization 76
- Program Organization 77
- Nesting blocks 79
- Nesting depth 80
- Example of nesting depth 80
- Different storage types 81
- START-UP 82
- Processing the User Program 82
- Definition of Terms used in 83
- Interrupt events 85
- Accumulators as working 86
- Bit condition codes 87
- Example of ERAB 88
- Other bit condition codes 88
- Word condition codes 88
- •• CC 1 and CC 0 89
- 3 - 18 C79000-B8576-C898-01 89
- Binary logic 90
- ±0,1469368 x 10 93
- ±0,1701412 x 10 93
- Examples of load and 94
- Addressing I/Os 96
- Bit assignment: 98
- Counter value 100
- Counter C 10 100
- Basic Operations 101
- Arithmetic operations 102
- Comparison operations 103
- Block operations 103
- NOP/display/stop operations 104
- Logic operations 105
- AND-before-OR operation 106
- OR-before-AND operation 107
- Set/reset operations 108
- (continued) 109
- Timer operations 111
- Timer operations (continued) 112
- Stored ON-delay timer 114
- Counter operations 115
- Supplementary Operations 120
- Binary logic operations 121
- Digital logic operations 121
- Timer and counter 123
- Examples 124
- Supplementary Operations 124
- Load and transfer 125
- Jump operations 129
- Executive Operations 130
- Shift operations 131
- ↓ DEF ↑ 133
- ↓ DED ↑ 134
- Conversion examples 135
- Examples of CFW, CSW 135
- Decrement/ 136
- Processing operations 136
- 1. Principle of substitution: 138
- Principle of the substitution 140
- Example of DI operation 141
- Disabling/enabling 142
- SED/SEE disable/enable 143
- Use of SED/SEE 144
- Semaphore Operations 144
- Continued on next page 146
- Operating Modes and Program 149
- Processing Levels 149
- 4Operating Modes and Program 150
- 4.1 Introduction and Overview 151
- 6ES5 948-3UA11 151
- LED display of modes 152
- Introduction and Overview 152
- 4.2 Program Processing Levels 154
- Features of a program 155
- Program Processing Levels 155
- Nesting other levels 156
- Specific system program 156
- Priority 157
- Response to double 158
- Examples of double 158
- Description of the individual 159
- 4.3 STOP Mode 160
- Request by the system 162
- Operator request 162
- STOP Mode 162
- 4.4 RESTART Mode 164
- When is a WARM RESTART 166
- permitted? 166
- MANUAL WARM RESTART 166
- RESTART Mode 166
- MANUAL WARM 170
- Power failure at RESTART 172
- Aborting RETENTIVE 173
- COLD RESTART 173
- 4.5 RUN Mode 174
- Cyclic Program Execution 175
- Interrupt points 177
- ACCUs as data storage 177
- RUN Mode 177
- Delay interrupt (from 178
- Version -3UB12) 178
- Interruptions 179
- Special features 179
- Clock-driven time interrupts 180
- User interface: OB 9 181
- TIME INTERRUPTS 182
- Collision of time interrupts 183
- (WECK-FE) 183
- Continuing program 184
- CONTROLLER INTERRUPT: 185
- Processing Closed Loop 185
- Controllers 185
- CLOSED LOOP 185
- PROCESS INTERRUPT: 186
- Interrupt-Driven Program 186
- Execution 186
- Multiple interrupts 187
- Process interrupt signal 187
- (at block boundaries) 188
- Nested Interrupt-Driven and 189
- Time-Driven Program 189
- Response time 191
- Interrupt and Error Handling 192
- Contents 193
- 5Interrupt and Error Handling 194
- C79000-B8576-C898-01 195
- 5.6 Error Information 196
- OUTPUT ISTACK 197
- System data RS 3 and RS 4 197
- Error Information 197
- 5 - 8 C79000-B8576-C898-01 199
- Example: 200
- 5 - 10 C79000-B8576-C898-01 201
- CONTROL BITS 202
- 5 - 12 C79000-B8576-C898-01 203
- Control bit Meaning 204
- 5 - 14 C79000-B8576-C898-01 205
- Lines 4 and 5 (CONTROL BITS) 206
- 5 - 16 C79000-B8576-C898-01 207
- Lines 6 to 8 (CONTROL BITS) 208
- ISTACK Content 209
- Explanation of the ISTACK 210
- 5 - 20 C79000-B8576-C898-01 211
- Information about the error 212
- ISTACK ID Meaning 212
- Condition code 213
- Cause of interrupt 213
- Meaning (called error OB) 214
- 5 - 24 C79000-B8576-C898-01 215
- Example 2: 217
- Continuation 1 of Example 2: 218
- Continued on the next page 218
- Continuation 2 of Example 2: 219
- C79000-B8576-C898-01 5 - 29 220
- Response of organization 221
- Interruptions during 222
- 5.5 Errors during RESTART 223
- DB0-FE (DB 0 Errors) 224
- DB1-FE (DB 1 Errors) 225
- DB2-FE (DB 2 Errors) 226
- DX0-FE (DX 0 or DX 2 227
- Errors during RESTART 228
- Errors which lead direct to 229
- Errors in RUN and in RESTART 229
- Errors- which cause an error 230
- OB to be called 230
- Substitution error 231
- Operation code error 232
- Parameter error 233
- LZF - calling a block that 234
- Load/transfer error 235
- Other runtime errors 236
- OB 182 error identifiers 238
- Error identifiers of the 239
- OB 150 error identifiers 240
- Error identifiers of OB 151 241
- OB 152 and OB 153 241
- QVZ during direct access 244
- QVZ during PII update 245
- IPC flags 245
- STOP in the case of QVZ 246
- ZYK (Cycle Time Exceeded 247
- WECK-FE (Collision of Time 248
- Interrupts) 248
- REG-FE (Controller Error) 249
- Entry in the control bit 250
- ABBR (Abort) 251
- Communication Errors 252
- Error numbers 1 to 3 253
- Meaning of the error numbers 253
- Integrated Special Functions 254
- 6Integrated Special Functions 257
- 6.1 Introduction 258
- Introduction 259
- Interfaces 260
- Errors during special 261
- Special functions with 262
- Function 263
- Possible errors 264
- Parameters 265
- 6 - 20 C79000-B8576-C898-01 272
- Possible errors: 273
- 6 - 26 C79000-B8576-C898-01 278
- Characteristics of the 280
- Data field in the flag area 281
- 15 12 11 8 7 0Bit no 287
- Important points 289
- Continued on the nex page 290
- Overview 292
- Enabling/disabling the 292
- Statistical data 293
- Functions 294
- 15 0Bit no. 4 3 295
- Function no.0 295
- Special Features 296
- Reaction to a COLD 296
- Calling OB 152 in a start-up 297
- Calling OB 152 when the 298
- OB 152: Cycle Statistics 298
- 6 - 50 C79000-B8576-C898-01 302
- Programming the 303
- :JU OB162 Loop counter 304
- RLO, CC 0 and CC 1 306
- Storing the BSTACK 306
- JU OB 170 308
- Continuation of the example: 309
- 3 (No. of elements in DX 10) 309
- DBA/DBL register 310
- Applications of OB 180 310
- Application of OB 181 314
- RLO, CC1, CC0 315
- 3 to 255) 316
- 15 8 7 0Bit no 318
- Reactions to errors 319
- Application 320
- Example 1 326
- :JU OB 190 Save flags 326
- :JU OB 191 Write back flags 326
- Example 2 326
- STEP 5 program in OB 13: 327
- Write the 327
- FYs back 327
- 6 - 76 C79000-B8576-C898-01 328
- OB 200: initialize 329
- OB 202: send 329
- OB 203: send test 329
- OB 204: receive 329
- OB 205: receive test 329
- What are pages? 330
- How to access pages 331
- Address areas for 332
- Notes on assigning 333
- OB 216 to OB 218: Page Access 335
- 824 23 15 7 339
- 6.22 OB 220: Sign Extension 342
- Error IDs 345
- Communication Flags 346
- :JU OB 226 read word 349
- COLD RESTART, however, not in 351
- COLD RESTART, but in another 351
- Data handling blocks 352
- Assignment aid 352
- Using the handling blocks 352
- Shift Registers 353
- Initializing 354
- Shifting 354
- ≤ L ≤ 256 358
- 6 - 106 C79000-B8576-C898-01 358
- Memory requirements 359
- Functional Description of 362
- STEU control word 363
- PID algorithm 363
- Differentiator 363
- Disturbance compensation 363
- PID Algorithm 364
- = TI ∗ XW 365
- (TD ∗ QU 365
- ≤YA ≤ LLV 367
- - Limit values 368
- - Entries in the DB: 368
- - Output variable is limited: 368
- Bit assignment of the control 369
- DW 11 in the transfer DB) 369
- Format of controller inputs 372
- General notes 373
- Controller parameters 374
- Parameter changes 375
- Abbreviations for PID 375
- Normalized fixed point 376
- Extended Data Block DX 0 380
- 7Extended Data Block DX 0 381
- 7.1 Application 382
- 7.2 Structure of DX 0 383
- Formal structure: 384
- Structure of DX 0 384
- Example of DX 0 385
- 7.3 Parameters for DX 0 386
- Parameters for DX 0 387
- Updating the timers 389
- Parameters for interrupt 390
- 7 - 14 C79000-B8576-C898-01 392
- Assigning Parameters 393
- 7 - 16 C79000-B8576-C898-01 394
- Flowchart for completing the 395
- DX 0 screen forms 395
- 7 - 18 C79000-B8576-C898-01 396
- Memory Assignment and 397
- Organization 397
- 8Memory Assignment and 398
- Structure of the Memory Area 399
- RAM or EPROM 400
- (see also Fig. 8-2) 400
- Address Distribution of 401
- Address areas for the 403
- Block Headers in the User 405
- Block Address Lists in Data 406
- Block DB 0 406
- Start address of FB 40 407
- 8 - 14 C79000-B8576-C898-01 409
- RS / RT Area 410
- Assignment of the system 411
- Bit Assignment of the 413
- System Data Words 413
- Example of UALW 415
- Address: EA02H 416
- High byte 416
- Low byte 416
- Example of UAMK 417
- STOP and RESTART IDs 418
- Address: EA05H 418
- High byte: STOP IDs 418
- Low byte: RESTART IDs 418
- 8 - 24 C79000-B8576-C898-01 419
- Address: EA07H 420
- High byte: RESET IDs 420
- 8 - 26 C79000-B8576-C898-01 421
- RS 29 (HIGH): 422
- RS 29 (LOW): 422
- 8 - 28 C79000-B8576-C898-01 423
- 8 - 30 C79000-B8576-C898-01 425
- 8 - 32 C79000-B8576-C898-01 427
- 8 - 34 C79000-B8576-C898-01 429
- Memory Access using 430
- Absolute Addresses 430
- 9Memory Access using 431
- 9.1 Introduction 432
- Memory access 434
- Operations 436
- LIR/TIR: Loading to or 437
- Transferring from a 16-Bit 437
- Memory Area Indirectly 437
- 9 - 10 C79000-B8576-C898-01 438
- Registers 0 to 3 and 9 to 12: 439
- ACCU 1, 2, 3 and 4 439
- Register 6: Data Block Start 439
- Address (DBA) 439
- Register 8: DBL = Data 442
- Block Length 442
- 8 (DW 0 to DW 7) 443
- Example 1 continued: 445
- Permissible memory areas 446
- Transferring Fields of Memory 446
- TNB and TWN between 8 and 448
- 16 bit memory areas 448
- Source DB 449
- Dest. DB 449
- LENGTH >= 4096 453
- Changing the BR register 454
- Operations for Transfer 455
- Accessing the Local 456
- Testing and setting a busy 457
- Sequence 458
- Permissible address area 458
- Error reaction 458
- Accessing the Page Memory 461
- Opening a page 462
- Multiprocessor Mode and 466
- Communication 466
- 10Multiprocessor Mode and 468
- 10.1 Multiprocessor Mode 469
- Exchanging Data via IPC 470
- Multiprocessor Mode 471
- Data exchange between 472
- CPUs and communication 472
- Transmitting IPC flags in 473
- Multiprocessor 473
- Inputting or changing DB 1 474
- Using the DB 1 screen form 474
- I/O assignment: 475
- Example of editing DB 1 476
- Entering DB 1 477
- Multiprocessor Communication 479
- How the Buffer is 481
- Processed and Managed 481
- System Start-Up 484
- Calling Communication OBs 485
- How to Assign Parameters 486
- Condition codes 487
- Condition code byte 488
- Evaluation of the code byte 489
- Initialization conflict 490
- Warning 493
- Transfer time 495
- CPU 1 CPU 2 496
- Mode (automatic/manual) 498
- •• block ID 499
- •• block number 499
- 10 - 34 C79000-B8576-C898-01 499
- Assignment list 500
- CPU 1 and CPU 3 501
- ; Receiver: CPU 3/22 fields 501
- ; Receiver: CPU 2/2 fields 501
- Total capacity 502
- 10.5 SEND Function (OB 202) 503
- Block ID 504
- Block number 504
- Field number 504
- SEND Function (OB 202) 504
- Transmitting capacity 507
- Structure of the (parameter) 510
- ACCU-1-L 510
- Transmitting CPU 510
- RECEIVE Function (OB 204) 510
- Receiving capacity 512
- 10 - 48 C79000-B8576-C898-01 513
- 10.9 Applications 516
- Programming function 517
- FB 200 continued 518
- Applications 519
- FB 204 continued: 522
- Programming FB 110 523
- FB 205 continued: 523
- FB 110 continued: 524
- Application of FB 110 527
- The problem 529
- The solution 530
- Data structure 530
- Structure of the 531
- Program structure 533
- FB 100 continued: 536
- 001F :T FW 242 536
- FB 101 continued: 538
- Application example 540
- PG Interfaces and Functions 544
- 11PG Interfaces and Functions 545
- 11.1 Overview 546
- 11.2 PG Functions 547
- WAIT STATE 548
- Memory configuration 548
- Output address 549
- Overall reset 549
- Compress memory 549
- Transfer block 550
- Delete block 551
- Start/stop 551
- Status block 552
- Program test 553
- Executing the function and 554
- PG Functions 554
- Cancelling the 555
- Aborting the function 555
- 11 - 16 C79000-B8576-C898-01 558
- Force variables 559
- Activities at Checkpoints 560
- 11 - 20 C79000-B8576-C898-01 562
- Installation 564
- Operation 564
- Parallel operation with 566
- 11 - 26 C79000-B8576-C898-01 568
- Special feature with cyclic 570
- Appendix 571
- C79000-A8576-C898-01 573
- Definition of terms 575
- Error IDs in System 576
- Data RS 3 and RS 4 576
- 12 - 8 C79000-A8576-C898-01 577
- RS 3 RS 4 Explanation 578
- Error IDs in ACCU 1 579
- 12 - 12 C79000-A8576-C898-01 581
- 12 - 14 C79000-A8576-C898-01 583
- 12 - 16 C79000-A8576-C898-01 585
- LEVEL (hexadecimal) 586
- Identifier Level 586
- Ready to start? 587
- Error analysis 587
- INTERRUPT STACK 588
- ! F1!F2!F3!F4!F5!F6!F7!F8! 590
- ! DISP SYMB!!!! !LIB.NO.!!! 590
- REL-SAC 590
- Further Reading 591
- Index and Lists 594
- List of Abbreviations 595
- C79000-T8576-C898-01 14 - 5 597
- 14 - 6 C79000-T8576-C898-01 598
- C79000-T8576-C898-01 14 - 7 599
- 14 - 8 C79000-T8576-C898-01 600
- C79000-T8576-C898-01 14 - 9 601
- List of Tables and Figures 602
- List of Figures 608
- C79000-V8576-C067-01 1 613
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