Ladder Logic (LAD) for S7-300 and S7-400 Programming
A5E00706949-01
4-1
4 Counter Instructions
4.1 Overview of Counter Instructions
Area in Memory
Counters have an area reserved for them in the memory of your CPU. This
memory area reserves one 16-bit word for each counter address. The ladder logic
instruction set supports 256 counters.
The counter instructions are the only functions that have access to the counter
memory area.
Count Value
Bits 0 through 9 of the counter word contain the count value in binary code. The
count value is moved to the counter word when a counter is set. The range of the
count value is 0 to 999.
You can vary the count value within this range by using the following counter
instructions:
•
S_CUD Up-Down Counter
•
S_CD Down Counter
•
S_CU Up Counter
•
---( SC ) Set Counter Coil
•
---( CU ) Up Counter Coil
•
---( CD ) Down Counter Coil
Comments to this Manuals