Siemens S6 PCN User Manual

User’s Manual 04.98C5158-Bit CMOS Microcontrollerhttp://www.siemens.de/Semiconductor/

IntroductionC515 Semiconductor Group 1-4 1.1 Pin Configurations This section describes the pin configuration of the C515. Figure 1-3 Pin Conf

Semiconductor Group 6-57On-Chip Peripheral ComponentsC5156.4 A/D Converter The C515 provides an A/D converter with the following features:– 8 mult

Semiconductor Group 6-58On-Chip Peripheral ComponentsC515 Figure 6-30 A/D Converter Block Diagram MCB03207.1.2.3.4.5.6MSB(D9 )HA/DADDATSingle

Semiconductor Group 6-59On-Chip Peripheral ComponentsC5156.4.2 A/D Converter Registers This section describes the bits/functions of the registers whic

Semiconductor Group 6-60On-Chip Peripheral ComponentsC515Note :Generally, before entering the power-down mode, an A/D conversion in progress must best

Semiconductor Group 6-61On-Chip Peripheral ComponentsC5156.4.2.3 A/D Converter Interrupt Control Bits in IEN1 and IRCONThe A/D converter interrupt is

Semiconductor Group 6-62On-Chip Peripheral ComponentsC5156.4.2.4 Programmable Reference Voltages of the A/D Converter (DAPR Register) The C515 has tw

Semiconductor Group 6-63On-Chip Peripheral ComponentsC515DAPR.3-.0 is the contents of the low-order nibble, and DAPR.7-.4 the contents of the high-ord

Semiconductor Group 6-64On-Chip Peripheral ComponentsC515 Figure 6-31 Adjusting the Internal Reference Voltages within Range of the External Anal

Semiconductor Group 6-65On-Chip Peripheral ComponentsC515The external reference voltage supply need only be applied when the A/D converter is used,oth

Semiconductor Group 6-66On-Chip Peripheral ComponentsC5156.4.3 A/D Conversion Timing An A/D conversion is internally started by writing the SFR DA

Semiconductor Group 1-5 IntroductionC515 Figure 1-4 Pin Configuration of P-MQFP-80-1 Package (top view) N.C. pins must not be connected

Semiconductor Group 6-67On-Chip Peripheral ComponentsC515 Figure 6-33 A/D Conversion TimingMCT03236Start of an A/D Conversion into ADDATResult is

Semiconductor Group 6-68On-Chip Peripheral ComponentsC515An A/D conversion is always started with the beginning of a processor cycle when it has beeni

Semiconductor Group 7-1Interrupt SystemC5157 Interrupt System The C515 provides 12 interrupt sources with four priority levels. Five interrupts ca

Semiconductor Group 7-2Interrupt SystemC515 Figure 7-1 Interrupt Structure, Overview Part 1 MCS03208Bit addressableRequest Flag iscleared by

Semiconductor Group 7-3Interrupt SystemC515 Figure 7-2 Interrupt Structure, Overview Part 2 MCS03209Bit addressableRequest Flag iscleared by hard

Semiconductor Group 7-4Interrupt SystemC5157.1 Interrupt Registers7.1.1 Interrupt Enable Registers Each interrupt vector can be individually enab

Semiconductor Group 7-5Interrupt SystemC515The IEN1 register contains enable/disable flags of the timer 2 external timer reload interrupt, theexternal

Semiconductor Group 7-6Interrupt SystemC5157.1.2 Interrupt Request / Control Flags Special Function Register TCON (Address 88H) Reset Value :

Semiconductor Group 7-7Interrupt SystemC515Special Function Register T2CON (Address C8H) Reset Value : 00H The shaded bits are not used for inter

Semiconductor Group 7-8Interrupt SystemC515Special Function Register IRCON (Address C0H) Reset Value : 00H Bit FunctionEXF2 Timer 2 external relo

IntroductionC515 Semiconductor Group 1-6 1.2 Pin Definitions and Functions This section describes all external signals of the C515 with its function

Semiconductor Group 7-9Interrupt SystemC515The timer 2 interrupt is generated by the logical OR of bit TF2 in register T2CON and bit EXF2 inregister I

Semiconductor Group 7-10Interrupt SystemC515Special Function Register SCON (Address. 98H) Reset Value : 00H The shaded bits are not used for inte

Semiconductor Group 7-11Interrupt SystemC5157.1.3 Interrupt Priority Registers The lower six bits of these two registers are used to define the int

Semiconductor Group 7-12Interrupt SystemC5157.2 Interrupt Priority Level Structure The following table shows the interrupt grouping of the C515 int

Semiconductor Group 7-13Interrupt SystemC5157.3 How Interrupts are Handled The interrupt flags are sampled at S5P2 in each machine cycle. The sampled

Semiconductor Group 7-14Interrupt SystemC515Note that if an interrupt of a higher priority level goes active prior to S5P2 in the machine cyclelabeled

Semiconductor Group 7-15Interrupt SystemC5157.4 External Interrupts The external interrupts 0 and 1 can be programmed to be level-activated or negat

Semiconductor Group 7-16Interrupt SystemC515 Figure 7-4 External Interrupt DetectionMCD01860P3.x/INTxe.g. P3.x/INTx> 1 Machine CycleLow-Level Th

Semiconductor Group 7-17Interrupt SystemC5157.5 Interrupt Response Time If an external interrupt is recognized, its corresponding request flag is s

Semiconductor Group 8-1Fail Safe MechanismsC5158 Fail Safe Mechanisms 8.1 Watchdog Timer 8.1.1 General Operation As a means of graceful recovery fr

Semiconductor Group 1-7 IntroductionC515 P3.0-P3.7 21-28212223242526272815-221516171819202122I/O Port 3 is an 8-bit quasi-bidirectional I/O port with

Semiconductor Group 8-2Fail Safe MechanismsC5158.1.3 Refreshing the Watchdog Timer Once started, the watchdog timer can only be cleared to 0000H by

Semiconductor Group 8-3Fail Safe MechanismsC5158.1.5 WDT Control and Status Flags The watchdog timer is controlled by two control flags (located in

Semiconductor Group 9-1Power Saving ModesC5159 Power Saving Modes The C515 provides two basic power saving modes, the idle mode and the power down

Semiconductor Group 9-2Power Saving ModesC5159.2 Power Saving Mode Control Register The functions of the power saving modes are controlled by bits

Semiconductor Group 9-3Power Saving ModesC5159.3 Idle Mode In the idle mode the oscillator of the C515 continues to run, but the CPU is gated off f

Semiconductor Group 9-4Power Saving ModesC515The idle mode is entered by two consecutive instructions. The first instruction sets the flag bit IDLE(PC

Semiconductor Group 9-5Power Saving ModesC5159.4 Slow Down Mode Operation (C515-LM/1RM only) In some applications, where power consumption and dissipa

Semiconductor Group 9-6Power Saving ModesC5159.5 Power Down Mode In the power down mode, the RC osciillator and the on-chip oscillator which operat

Semiconductor Group 9-7Power Saving ModesC5159.6 State of Pins in the Power Saving Modes In the idle mode and in the power down mode the port pins of

Semiconductor Group 10-1Device SpecificationsC51510 Device Specifications 10.1 Absolute Maximum Ratings Ambient temperature under bias (TA) ...

IntroductionC515Semiconductor Group 1-8P1.0 - P1.7 36-29363534333231302931-243130292827262524I/O Port 1is an 8-bit quasi-bidirectional I/O port with i

Semiconductor Group 10-2Device SpecificationsC51510.2 DC Characteristics VCC = 5 V + 10%, – 15%; VSS = 0 V TA = 0 to 70 °C for the SAB-C515TA = – 40

Semiconductor Group 10-3Device SpecificationsC515Power Supply Current 1) Capacitive loading on ports 0 and 2 may cause spurious noise pulses to

Semiconductor Group 10-4Device SpecificationsC515 ICC Diagram MCD0328200fOSCCCI4 8 12 16 20 2451015202530MHzmAActive ModeIdle ModeActive Mode

Semiconductor Group 10-5Device SpecificationsC51510.3 A/D Converter Characteristics VCC = 5 V + 10%, – 15%; VSS = 0 V TA = 0 to 70 °C for the SAB-

Semiconductor Group 10-6Device SpecificationsC51510.4 AC Characteristics (16 MHz) VCC = 5 V + 10%, – 15%; VSS = 0 V TA = 0 to 70 °C for the SA

Semiconductor Group 10-7Device SpecificationsC515AC Characteristics (16 MHz) (cont’d)External Data Memory Characteristics External Clock Drive

Semiconductor Group 10-8Device SpecificationsC51510.5 AC Characteristics (24 MHz) VCC = 5 V + 10%, – 15%; VSS = 0 V TA = 0 to 70 °C for the SAB-C51

Semiconductor Group 10-9Device SpecificationsC515AC Characteristics (24 MHz) (cont’d)External Data Memory Characteristics External Clock Driv

Semiconductor Group 10-10Device SpecificationsC515 Program Memory Read Cycle MCT00096ALEPSENPort 2LHLLtA8 - A15 A8 - A15A0 - A7Instr.INA0 - A

Semiconductor Group 10-11Device SpecificationsC515 Data Memory Read Cycle MCT00097ALEPSENPort 2WHLHtPort 0RDtLLDVtRLRHtLLWLtRLDVtAVLLtLLAX2tRLAZ

Semiconductor Group 1-9IntroductionC515XTAL2 39 36 – XTAL2Input to the inverting oscillator amplifier and input to the internal clock generator circui

Semiconductor Group 10-12Device SpecificationsC515 Data Memory Write Cycle MCT00098ALEPSENPort 2WHLHtPort 0WRtWLWHtLLWLtQVWXtAVLLtLLAX2tQVWHtAV

Semiconductor Group 10-13Device SpecificationsC515 CLKOUT Timing External Clock Drive on XTAL2 MCT00083ALECLK OUTPSENRD,WRtLLSHSLLHtSH

Semiconductor Group 10-14Device SpecificationsC51510.6 ROM Verification Characteristics for the C515-1RROM Verification Mode 1 ROM Verification Mo

Semiconductor Group 10-15Device SpecificationsC515ROM Verification Mode 2 ROM Verification Mode 2Parameter Symbol Limit Values Unitmin. typ max.ALE

Semiconductor Group 10-16Device SpecificationsC515 AC Testing: Input, Output Waveforms AC Testing: Float Waveforms Recommended Oscillator

Semiconductor Group 10-17Device SpecificationsC51510.7 Package Information (P-LCC-68) GPL050990.81 max1.270.43 ±0.10.18M68xDA-B20.320.15

Semiconductor Group 10-18Device SpecificationsC51510.8 Package Information (P-MQFP-80) 0.650.312.350.122.45 max180Index Marking17.2140

Semiconductor Group 11-1IndexC51511 IndexAA/D converter . . . . . . . . . . . . . . .6-57–6-68Conversion timing . . . . . . . . . .6-66–6-68General

Semiconductor Group 11-2IndexC515Overlapping of data/program memory 4-3Program memory access . . . . . . . . . . 4-3Program/data memory timing . .

Semiconductor Group 11-3IndexC515PDS . . . . . . . . . . . . . . . . . . . . . . . . .3-6, 9-2Pin configuration . . . . . . . . . . . . . . . . . .

IntroductionC515Semiconductor Group 1-10ALE 50 48 O The Address Latch enableoutput is used for latching the address into external memory during normal

Semiconductor Group 11-4IndexC515Timer/counter 0 and 1 . . . . . . .6-14–6-21Mode 0, 13-bit timer/counter . . . . 6-18Mode 1, 16-bit timer/counter

Semiconductor Group 2-1Fundamental StructureC5152 Fundamental Structure The C515 is fully compatible to the architecture of the standard 8051/C5

Fundamental StructureC515Semiconductor Group 2-22.1 CPU The C515 is efficient both as a controller and as an arithmetic processor. It has extensive

Semiconductor Group 2-3Fundamental StructureC515Special Function Register PSW (Address D0H) Reset Value : 00H B Register The B register is used

Edition 04.98Published by Siemens AG,Bereich Halbleiter, Marketing-Kommunikation, Balanstraße 73,81541 München © Siemens AG 1998All Rights Reserve

Fundamental StructureC515Semiconductor Group 2-42.2 CPU Timing A machine cycle of the C515 consists of 6 states (12 oscillator periods). Each sta

Semiconductor Group 2-5Fundamental StructureC515 Figure 2-2 Fetch Execute Sequence ALEMCD03218S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6P1 P2 P2P1 P

Semiconductor Group 3-1Memory OrganizationC5153 Memory Organization The C515 CPU manipulates operands in the following four address spaces:– up to 6

Memory OrganizationC515Semiconductor Group 3-23.1 Program Memory, "Code Space" The C515-1R has 8 Kbytes of read-only program memory which

Semiconductor Group 3-3Memory OrganizationC5153.5 Special Function Registers The registers, except the program counter and the four general purpose

Memory OrganizationC515Semiconductor Group 3-4Table 3-1 Special Function Registers - Functional Blocks Block Symbol Name Address Contents afterRes

Semiconductor Group 3-5Memory OrganizationC515 PortsTL2T2CON 2)P0P1P2P3P4P5P6Timer 2, Low ByteTimer 2 Control RegisterPort 0Port 1Port 2Port

Memory OrganizationC515Semiconductor Group 3-6Table 3-2 Contents of the SFRs, SFRs in Numeric Order of their Addresses Addr Register Contentafter

Semiconductor Group 3-7Memory OrganizationC515 C0H2)IRCON 00HEXF2 TF2 IEX6 IEX5 IEX4 IEX3 IEX2 IADCC1HCCEN 00HCOCAH3COCAL3COCAH2COCAL2COCAH1COCAL

Semiconductor Group 4-1External Bus InterfaceC5154 External Bus Interface The C515 allows for external memory expansion. The functionality and impl

C515 User’s ManualRevision History : 04.98 Previous Releases: 08.97 Page (newversion)Page (prev.version)Subjects (changes since last revision)

Semiconductor Group 4-2External Bus InterfaceC515 Figure 4-1 External Program Memory Execution PCLOUTPCHOUTOne Machine Cycle One Machine CycleIN

Semiconductor Group 4-3External Bus InterfaceC5154.1.2 TimingThe timing of the external bus interface, in particular the relationship between the cont

Semiconductor Group 4-4External Bus InterfaceC5154.4 ALE, Address Latch Enable The C515 allows to switch off the ALE output signal. If the inter

Semiconductor Group 4-5External Bus InterfaceC5154.5 Enhanced Hooks Emulation Concept The Enhanced Hooks Emulation Concept of the C500 microcontrol

Semiconductor Group 4-6External Bus InterfaceC5154.6 ROM Protection for the C515 The C515-1R allows to protect the contents of the internal ROM ag

Semiconductor Group 4-7External Bus InterfaceC5154.6.2 Protected ROM Mode If the ROM is protected, the ROM verification mode 2 as shown in figure

Semiconductor Group 4-8External Bus InterfaceC515condition is stored internally. After each 16th data byte the cumulated verify result (pass or fail)

Semiconductor Group 5-1Reset / System ClockC5155 Reset and System Clock Operation5.1 Hardware Reset Operation The hardware reset function incor

Semiconductor Group 5-2Reset / System ClockC515The time required for a reset operation is the oscillator start-up time plus 2 machine cycles, which,un

Semiconductor Group 5-3Reset / System ClockC5155.2 Hardware Reset Timing This section describes the timing of the hardware reset signal.The input pin

General InformationC515 Table of Contents Page Semiconductor Group 5 1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Semiconductor Group 5-4Reset / System ClockC5155.3 Oscillator and Clock Circuit XTAL1 and XTAL2 are the output and input of a single-stage on-chip i

Semiconductor Group 5-5Reset / System ClockC515 Figure 5-4 On-Chip Oscillator Circuitry To drive the C515 with an external clock source, the

Semiconductor Group 5-6Reset / System ClockC5155.4 System Clock Output For peripheral devices requiring a system clock, the C515 provides a clock ou

Semiconductor Group 5-7Reset / System ClockC515 Figure 5-6 Timing Diagram - System Clock Output MCT01858S6 S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S

Semiconductor Group 6-1On-Chip Peripheral ComponentsC5156 On-Chip Peripheral ComponentsThis chapter gives detailed information about all on-chip perip

Semiconductor Group 6-2On-Chip Peripheral ComponentsC515Table 6-1 Alternate Functions of Port 1 and 3 Port Alternate FunctionsDescriptionP1.0P1.1P

Semiconductor Group 6-3On-Chip Peripheral ComponentsC5156.1.2 Standard I/O Port Circuitry Figure 6-1 shows a functional diagram of a typical bit l

Semiconductor Group 6-4On-Chip Peripheral ComponentsC515The output drivers of port 1 to 5 have internal pullup FET’s (see figure 6-2). Each I/O line c

Semiconductor Group 6-5On-Chip Peripheral ComponentsC5156.1.2.1 Port 0 Circuitry Port 0, in contrast to ports 1 to 4, is considered as "true&quo

Semiconductor Group 6-6On-Chip Peripheral ComponentsC5156.1.2.2 Port 1, Port 3 to Port 5 Circuitry The pins of ports 1, 3, 4, and 5 are multifunction

General InformationC515 Table of Contents Page Semiconductor Group 6 6.2.1.4 Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Semiconductor Group 6-7On-Chip Peripheral ComponentsC5156.1.2.3 Port 2 Circuitry As shown in figure 6-3 and below in figure 6-5, the output drivers of

Semiconductor Group 6-8On-Chip Peripheral ComponentsC515 Figure 6-6 Port 2 Pull-up Arrangement Port 2 in I/O function works similar to the standar

Semiconductor Group 6-9On-Chip Peripheral ComponentsC5156.1.2.4 Detailed Output Driver Circuitry In fact, the pullups mentioned before and included i

Semiconductor Group 6-10On-Chip Peripheral ComponentsC515– The pullup FET p3 is of p-channel type. It is only activated if the voltage at the port pin

Semiconductor Group 6-11On-Chip Peripheral ComponentsC5156.1.3 Port Timing When executing an instruction that changes the value of a port latch, t

Semiconductor Group 6-12On-Chip Peripheral ComponentsC5156.1.4 Port Loading and Interfacing The output buffers of ports 1 to 5 can drive TTL inputs

Semiconductor Group 6-13On-Chip Peripheral ComponentsC5156.1.5 Read-Modify-Write Feature of Ports 0 to 5 Some port-reading instructions read the latch

Semiconductor Group 6-14On-Chip Peripheral ComponentsC5156.2 Timers/Counters The C515 contains three general purpose 16-bit timers/counters, timer 0

Semiconductor Group 6-15On-Chip Peripheral ComponentsC5156.2.1.1 Timer/Counter 0 and 1 Registers Totally six special function registers control t

Semiconductor Group 6-16On-Chip Peripheral ComponentsC515Special Function Register TCON (Address 88H) Reset Value : 00H Bit FunctionTR0 Timer 0 ru

General InformationC515 Table of Contents Page Semiconductor Group 7 8.1.2.2 The Second Possibility of Starting the Watchdog Timer . . . . . . .

Semiconductor Group 6-17On-Chip Peripheral ComponentsC515Special Function Register TMOD (Address 89H) Reset Value : 00H Bit FunctionGATE Gati

Semiconductor Group 6-18On-Chip Peripheral ComponentsC5156.2.1.2 Mode 0 Putting either timer/counter 0,1 into mode 0 configures it as an 8-bit time

Semiconductor Group 6-19On-Chip Peripheral ComponentsC5156.2.1.3 Mode 1 Mode 1 is the same as mode 0, except that the timer register is running wi

Semiconductor Group 6-20On-Chip Peripheral ComponentsC5156.2.1.4 Mode 2 Mode 2 configures the timer register as an 8-bit counter (TL0) with automat

Semiconductor Group 6-21On-Chip Peripheral ComponentsC5156.2.1.5 Mode 3 Mode 3 has different effects on timer 0 and timer 1. Timer 1 in mode 3 simpl

Semiconductor Group 6-22On-Chip Peripheral ComponentsC5156.2.2 Timer/Counter 2 with Additional Compare/Capture/Reload The timer 2 with additional

Semiconductor Group 6-23On-Chip Peripheral ComponentsC515 Figure 6-13 Timer 2 Block Diagram MCB03205ComparatorCCL3/CCH3CaptureInput/OutputContro

Semiconductor Group 6-24On-Chip Peripheral ComponentsC5156.2.2.1 Timer 2 Registers This chapter describes all timer 2 related special function regist

Semiconductor Group 6-25On-Chip Peripheral ComponentsC515The T2CON timer 2 control register is a bitaddressable register which controls the timer 2 fu

Semiconductor Group 6-26On-Chip Peripheral ComponentsC515Special Function Register TL2 (Address CCH) Reset Value : 00HSpecial Function Register TH2 (A

Semiconductor Group 1-1 IntroductionC515 1 Introduction The C515 is a member of the Siemens C500 family of 8-bit microcontrollers. lt is functionally

Semiconductor Group 6-27On-Chip Peripheral ComponentsC515Special Function Register IEN0 (Address A8H) Reset Value : 00HSpecial Function Register IEN1

Semiconductor Group 6-28On-Chip Peripheral ComponentsC515Special Function Register CCEN (Address C1H) Reset Value : 00H Bit FunctionCOCA

Semiconductor Group 6-29On-Chip Peripheral ComponentsC5156.2.2.2 Timer 2 Operation The timer 2, which is a 16-bit-wide register, can operate as timer

Semiconductor Group 6-30On-Chip Peripheral ComponentsC515Reload of Timer 2The reload mode for timer 2 is selected by bits T2R0 and T2R1 in SFR T2CON.

Semiconductor Group 6-31On-Chip Peripheral ComponentsC5156.2.2.3 Compare Function of Registers CRC, CC1 to CC3 The compare function of a timer/regis

Semiconductor Group 6-32On-Chip Peripheral ComponentsC515 Figure 6-15 Port Latch in Compare Mode 0 Figure 6-16 Timer 2 with Registers CCx

Semiconductor Group 6-33On-Chip Peripheral ComponentsC515 Figure 6-17 Function of Compare Mode 06.2.2.3.2 Modulation Range in Compare Mode 0 Gen

Semiconductor Group 6-34On-Chip Peripheral ComponentsC515 Figure 6-18 Modulation Range of a PWM Signal, generated with a Timer 2/CCx Register Co

Semiconductor Group 6-35On-Chip Peripheral ComponentsC5156.2.2.3.3 Compare Mode 1 In compare mode 1, the software adaptively determines the transitio

Semiconductor Group 6-36On-Chip Peripheral ComponentsC515 Figure 6-19 Port Latch in Compare Mode 1 Figure 6-20 Timer 2 with Registers CCx

IntroductionC515 Semiconductor Group 1-2Listed below is a summary of the main features of the C515: ¥ Full upward compatibility with SAB 80C515

Semiconductor Group 6-37On-Chip Peripheral ComponentsC5156.2.2.4 Using Interrupts in Combination with the Compare Function The compare service of re

Semiconductor Group 6-38On-Chip Peripheral ComponentsC515The second configuration which should be noted is when compare function is combined withnegat

Semiconductor Group 6-39On-Chip Peripheral ComponentsC5156.2.2.5 Capture Function Each of the compare/capture registers CC1 to CC3 and the CRC regis

Semiconductor Group 6-40On-Chip Peripheral ComponentsC515 Figure 6-21 Timer 2 - Capture with Register CRC Figure 6-22 Timer 2 - Capture

Semiconductor Group 6-41On-Chip Peripheral ComponentsC5156.3 Serial Interface The serial port of the C515 is full duplex, meaning it can transmit a

Semiconductor Group 6-42On-Chip Peripheral ComponentsC5156.3.1 Multiprocessor Communication Modes 2 and 3 have a special provision for multiprocess

Semiconductor Group 6-43On-Chip Peripheral ComponentsC515Special Function Register SCON (Address 98H) Reset Value : 00HSpecial Function Register SBUF

Semiconductor Group 6-44On-Chip Peripheral ComponentsC5156.3.3 Baud Rate Generation There are several possibilities to generate the baud rate clock

Semiconductor Group 6-45On-Chip Peripheral ComponentsC515 Figure 6-23 Baud Rate Generation for the Serial Port Depending on the programmed operating

Semiconductor Group 6-46On-Chip Peripheral ComponentsC5156.3.3.3 Baud Rate in Mode 1 and 3In these modes the baud rate is variable and can be generate

Semiconductor Group 1-3 IntroductionC515 Figure 1-2 Logic Symbol MCL03199XTAL1XTAL2RESETEAALEPSENC515Port 08 Bit Digital I/O1PortPort 2Port 3

Semiconductor Group 6-47On-Chip Peripheral ComponentsC515Table 6-5 Timer 1 generated Commonly used Baud RatesBaud Rate fOSC (MHz) SMOD BD Timer 1Mode

Semiconductor Group 6-48On-Chip Peripheral ComponentsC5156.3.4 Details about Mode 0 Serial data enters and exists through RXD. TXD outputs the shift

Semiconductor Group 6-49On-Chip Peripheral ComponentsC515 Figure 6-24 Serial Interface, Mode 0, Functional Diagram MCS02101Internal Bus1SBUFZero

Semiconductor Group 6-50On-Chip Peripheral ComponentsC515 Figure 6-25 Serial Interface, Mode 0, Timing Diagram S12S3S4S5S6S S6S5S4S3S21S S6S5S4S

Semiconductor Group 6-51On-Chip Peripheral ComponentsC5156.3.5 Details about Mode 1 Ten bits are transmitted (through TXD), or received (through RX

Semiconductor Group 6-52On-Chip Peripheral ComponentsC515 Figure 6-26 Serial Interface, Mode 1, Functional Diagram MCS02103Internal Bus1SBUFZero De

Semiconductor Group 6-53On-Chip Peripheral ComponentsC515 Figure 6-27 Serial Interface, Mode 1, Timing Diagram MCT02104to SBUFD7Stop BitD6

Semiconductor Group 6-54On-Chip Peripheral ComponentsC5156.3.6 Details about Modes 2 and 3 Eleven bits are transmitted (through TXD), or received (

Semiconductor Group 6-55On-Chip Peripheral ComponentsC515 Figure 6-28 Serial Interface, Mode 2 and 3, Functional Diagram MCS02105Internal BusTB8S

Semiconductor Group 6-56On-Chip Peripheral ComponentsC515 Figure 6-29 Serial Interface, Mode 2 and 3, Timing Diagram MCT02587Write to SBUFTX Cl